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| 型号： | WJLXT386LEB2 |
| 厂商： | INTEL CORP |
| 元件分类： | 数字传输电路 |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封装： | 14 X 14MM, ROHS COMPLIANT, LQFP-100 |
| 文件页数： | 24/86页 |
| 文件大小： | 1081K |
| 代理商： | WJLXT386LEB2 |
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LXT386 — QUAD T1/E1/J1 Transceiver
30
Datasheet
3.4
Driver Failure Monitor
The LXT386 transceiver incorporates an internal power Driver Failure Monitor (DFM) in parallel
with TTIP and TRING that is capable of detecting secondary shorts without cable. DFM is available
only in configurations with no transmit series resistors (T1 mode with TVCC=3.3V). This feature is
available in the serial and parallel host modes but not available in the hardware mode of operation.
A capacitor, charged via a measure of the driver output current and discharged by a measure of the
maximum allowable current, is used to detect a secondary short failure. Secondary shorted lines
draw excess current, overcharging the cap. When the capacitor charge deviates outside the nominal
charge window, a driver short circuit fail (DFM) is reported in the respective register by setting an
interrupt. During a long string of spaces, a short-induced overcharge eventually bleeds off, clearing
the DFM flag.
Note that unterminated lines of adequate length (
λ/4) may effectively behave as short-circuits as
seen by the driver and therefore trigger the DFM. Under these circumstances, the alarm should be
disabled.
In addition, LXT386 features output driver short-circuit protection. When the output current
exceeds 100 mA, LXT386 limits the driver’s output voltage to avoid damage.
3.5
Line Protection
Figure 7 on page 31 shows recommended line interface circuitry. In the receive side, the 1 k
Ω
series resistors protect the receiver against current surges coupled into the device. Due to the high
receiver impedance (70 k
Ω typical) the resistors do not affect the receiver sensitivity. In the
transmit side, the Schottky diodes D1-D4 protect the output driver.While not mandatory for normal
operation, these protection elements are strongly recommended to improve the design robustness.
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