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| 型号： | WJLXT386LEB2 |
| 厂商： | INTEL CORP |
| 元件分类： | 数字传输电路 |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封装： | 14 X 14MM, ROHS COMPLIANT, LQFP-100 |
| 文件页数： | 5/86页 |
| 文件大小： | 1081K |
| 代理商： | WJLXT386LEB2 |
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QUAD T1/E1/J1 Transceiver — LXT386
Datasheet
13
G2
H3
H2
J4
J3
J2
J1
K1
90
91
92
93
94
95
96
97
D0/LOOP0
D1/LOOP1
D2/LOOP2
D3/LOOP3
D4/DLOOP0
D5/DLOOP1
D6/DLOOP2
D7/DLOOP3
DI/O
Loopback Mode Select/Parallel Data bus.
Host Mode:
When a non-multiplexed microprocessor interface is selected, these pins
function as a bi-directional 8-bit data port.
When a multiplexed microprocessor interface is selected, these pins carry
both bi-directional 8-bit data and address inputs A0 -A7.
In serial Mode, D0-7 should be grounded.
Hardware Mode:
In hardware mode, the LXT386 works in normal operation if this pin is left
open (unconnected).
The LXT386 enters remote loopback mode if LOOP is Low. In this mode,
data on TPOS and TNEG is ignored and data received on RTIP and
RRING is looped around and retransmitted on TTIP and TRING. Note: in
data recovery mode, the pulse template cannot be guaranteed while in a
remote loopback.
The LXT386 enters analog local loopback mode if LOOP=1 and
DLOOP=0. In this mode, data received on RTIP and RRING is ignored
and data transmitted on TTIP and TRING is internally looped around and
routed back to the receive inputs.
The LXT386 enters digital local loopback if LOOP=1 and DLOOP=1. In
this mode, data received on TCLK/TPOS/TNEG is digitally looped back to
RCLK/RPOS/RNEG.
Note: Note: when these inputs are left open, they stay in a high
impedance state. Therefore, the layout design should not route
signals with fast transitions near the LOOP pins. This practice will
minimize capacitive coupling.
L1
12
TCLK1
DI
Transmit Clock.
L2
13
TPOS1/
TDATA1
DI
Transmit Positive Data.
Transmit Data.
L3
14
TNEG1/
UBS1
DI
Transmit Negative Data.
Unipolar/Bipolar Select.
M1
15
RCLK1
DO
Receive Clock.
M2
16
RPOS1/
RDATA1
DO
Receive Positive Data.
Receive Data.
M3
17
RNEG1/
BPV1
DO
Receive Negative Data.
Bipolar Violation Detect.
K3
18
LOS1
DO
Loss of Signal.
Table 1.
Pin Assignments and Signal Descriptions (Sheet 3 of 11)
Ball #
PBGA
Pin #
LQFP
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
N.C.: Not Connected.
2. N/C means “Not Connected”
LOOP
DLOOP
Operating Mode
Open
x
Normal Mode
0
x
Remote Loopback
1
0
Analog Local Loopback
1
Digital Local Loopback
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