参数资料
型号: WJLXT386LEB2
厂商: INTEL CORP
元件分类: 数字传输电路
英文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封装: 14 X 14MM, ROHS COMPLIANT, LQFP-100
文件页数: 6/86页
文件大小: 1081K
代理商: WJLXT386LEB2
LXT386 — QUAD T1/E1/J1 Transceiver
14
Datasheet
N1
19
TCLK0
DI
Transmit Clock. During normal operation TCLK is active, and TPOS and
TNEG are sampled on the falling edge of TCLK. If TCLK is Low, the output
drivers enter a low power high Z mode. If TCLK is High for more than 16
clock cycles the pulse shaping circuit is disabled and the transmit output
pulse widths are determined by the TPOS and TNEG duty cycles.
When pulse shaping is disabled, it is possible to overheat and damage the
LXT384 device by leaving transmit inputs high continuously. For example
a programmable ASIC might leave all outputs high until it is programmed.
To prevent this, clock one of these signals: TPOS, TNEG, TCLK or MCLK.
Another solution is to set one of these signals low: TPOS, TNEG, TCLK, or
OE.
Note that the TAOS generator uses MCLK as a timing reference. In order
to assure that the output frequency is within specification limits, MCLK
must have the applicable stability.
N2
20
TPOS0/
TDATA0
DI
Transmit Positive Data.
Transmit Data.
Transmit Negative Data.
Unipolar/Bipolar Select.
Bipolar Mode:
TPOS/TNEG are active high NRZ inputs. TPOS indicates the transmission
of a positive pulse whereas TNEG indicates the transmission of a negative
pulse.
Unipolar Mode:
When TNEG/UBS is pulled High for more than 16 consecutive TCLK clock
cycles, unipolar I/O is selected. In unipolar mode, B8ZS/HDB3 or AMI
encoding/decoding is determined by the CODEN pin (hardware mode) or
by the CODEN bit in the GCR register (software mode).
TDATA is the data input in unipolar I/O mode.
N3
21
TNEG0/
UBS0
DI
Table 1.
Pin Assignments and Signal Descriptions (Sheet 4 of 11)
Ball #
PBGA
Pin #
LQFP
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
N.C.: Not Connected.
2. N/C means “Not Connected”
TCLK
Operating Mode
Clocked
Normal operation
H
TAOS (if MCLK supplied)
H
Disable transmit pulse shaping (when
MCLK is not available)
L
Driver outputs enter tri-state
TPOS
TNEG
Selection
0
Space
1
0
Positive Mark
0
1
Negative Mark
1
Space
相关PDF资料
PDF描述
WJLXT388LEB2 DATACOM, PCM TRANSCEIVER, PQFP100
WJLXT388LEB2 DATACOM, PCM TRANSCEIVER, PQFP100
WJLXT901ALCA4 DATACOM, ETHERNET TRANSCEIVER, PQFP64
WJLXT907ALCA4 DATACOM, ETHERNET TRANSCEIVER, PQFP64
WJLXT901ALCA4 DATACOM, ETHERNET TRANSCEIVER, PQFP64
相关代理商/技术参数
参数描述
WJLXT6155LE.B5 制造商:Intel 功能描述:SONET/SDH/ATM Transceiver 1TX 1RX 64-Pin LQFP
WJLXT6155LE.B5-866255 功能描述:TXRX SDH/SONET/ATM HS 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:收发器 驱动器/接收器数:1/1 规程:RS422,RS485 电源电压:4.75 V ~ 5.25 V 安装类型:通孔 封装/外壳:8-DIP(0.300",7.62mm) 供应商设备封装:8-PDIP 包装:管件 产品目录页面:1402 (CN2011-ZH PDF)
WJLXT6155LE.B5-866256 制造商:Cortina Systems Inc 功能描述:SONET/SDH/ATM Transceiver 1TX 1RX 64-Pin LQFP T/R
WJLXT901ALC.A4 功能描述:IC 10BASE-T/AUI TXCVR 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器,接收器,收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC(0.295",7.50mm 宽) 供应商设备封装:16-SOIC 包装:带卷 (TR)
WJLXT901ALC.A4-865823 制造商:Cortina Systems Inc 功能描述:LXT901A UNIVERSAL ETHERNET TRA