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| 型号： | XGBE-XGXS-O4-N2 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 19/38页 |
| 文件大小： | 0K |
| 描述： | IP CORE 10GBE ETHERNET XGXS |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | XGBEXGXSO4N2 |
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Lattice Semiconductor
10Gb Ethernet XGXS IP Core User’s Guide
Table 8. XGXS Registers (Continued)
Bit(s)
Name
Description
R/W
Reset Value
1= TX lanes aligned
0 =TX lanes not aligned
4.24.12
PHY XGXS Lane Alignment
Writing to this bit sets the corresponding ORT82G5
register bits:
R
00
CH A = 30814[5]
CH B = 30914[5]
4.24.11
Pattern Testing ability
0 = Not able to generate pattern.
R
0
4.24.10
PHY XGXS has loop back
capability
1 = Has loop back capability
R
1
4.24.[9:4]
Reserved
Value always 0
R
0
1 = Lane 3 synchronized
0 = Lane 3 not synchronized
4.24.3
Lane 3 Sync
Writing to this bit sets the corresponding ORT82G5
register bits:
R
00
CH A = 30804[6,7]
CH B = 30904[6,7]
1 = Lane 2 synchronized
0 = Lane 2 not synchronized
4.24.2
Lane 2 Sync
Writing to this bit sets the corresponding ORT82G5
register bits:
R
00
CH A = 30804[4,5]
CH B = 30904[4,5]
1 = Lane 1 synchronized
0 = Lane 1 not synchronized
4.24.1
Lane 1 Sync
Writing to this bit sets the corresponding ORT82G5
register bits:
R
00
CH A = 30804[3,2]
CH B = 30904[3,2]
1 = Lane 0 synchronized
0 = Lane 0 not synchronized
4.24.0
Lane 0 Sync
Writing to this bit sets the corresponding ORT82G5
register bits:
R
00
CH A = 30804[0,1]
CH B = 30904[0,1]
XGXS Reserved Registers
4.25.15:3
Reserved
Value always 0
R
0
4.25.2
Receive test pattern enable
0 = Receive test pattern not enabled
R
0
4.25.1:0
Test pattern select
00
R
00
4.8000.15:0
XGXS TX PACKET
COUNTER
Counts in XGXS the number of packets sent in the TX
direction. Cleared on Read
R
0
4.8001.15:0
XGXS RX PACKET
COUNTER
Counts in XGXS the number of packets received in the
RX direction. Cleared on Read
R
0
Bit enables automatic resync by XGXS upon loss of
4.8002.15
XGXS Automatic channel
alignment resync.
sync.
1 = enable
R/W
1
0 = disable
Enables XGXS loopback
4.8002.14
XGXS Loopback
1 = enable
R/W
0
0 = disable
Enables XGMII loopback
4.8002.13
XGMII Loopback
1 = enable
R/W
0
0 = disable
4.8002.12:9 RESERVED
UNUSED
—
—
4.8002.8:0
RESERVED
UNUSED
—
—
19
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