- 您现在的位置：买卖IC网 > PDF目录300162 > XQ4013E-4PG223M (XILINX INC) Field Programmable Gate Array (FPGA) PDF资料下载
参数资料
| 型号： | XQ4013E-4PG223M |
| 厂商： | XILINX INC |
| 元件分类： | FPGA |
| 英文描述： | Field Programmable Gate Array (FPGA) |
| 中文描述： | FPGA, 576 CLBS, 10000 GATES, 111 MHz, CPGA223 |
| 封装： | CERAMIC, PGA-223 |
| 文件页数： | 14/36页 |
| 文件大小： | 294K |
| 代理商： | XQ4013E-4PG223M |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
QPRO XQ4000E/EX QML High-Reliability FPGAs
DS021 (v2.2) June 25, 2000
2-63
Product Specification
1-800-255-7778
R
1
2
3
4
5
6
XQ4028EX CLB Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System) and back-annotated to the simulation netlist.
All timing parameters assume worst-case operating condi-
tions (supply voltage and junction temperature). Values
apply to all XQ4000EX devices unless otherwise noted.
CLB Switching Characteristics
Symbol
Description
-4
Units
Min
Max
Combinatorial Delays
TILO
F/G inputs to X/Y outputs
-
2.2
ns
TIHO
F/G inputs via H’ to X/Y outputs
-
3.8
ns
TITO
F/G inputs via transparent latch to Q outputs
-
3.2
ns
THH0O
C inputs via SR/H0 via H to X/Y outputs
-
3.6
ns
THH1O
C inputs via H1 via H to X/Y outputs
-
3.0
ns
THH2O
C inputs via DIN/H2 via H to X/Y outputs
-
3.6
ns
TCBYP
C inputs via EC, DIN/H2 to YQ, XQ output (bypass)
-
2.0
ns
CLB Fast Carry Logic
TOPCY
Operand inputs (F1, F2, G1, G4) to COUT
-2.5
ns
TASCY
Add/Subtract input (F3) to COUT
-4.1
ns
TINCY
Initialization inputs (F1, F3) to COUT
-1.9
ns
TSUM
CIN through function generators to X/Y outputs
-
3.0
ns
TBYP
CIN to COUT, bypass function generators
-
0.60
ns
TNET
Carry net selay, COUT to CIN
-0.18
ns
Sequential Delays
TCKO
Clock K to flip-flop outputs Q
-
2.2
ns
TCKLO
Clock K to latch outputs Q
-
2.2
ns
Setup Time before Clock K
TICK
F/G inputs
1.3
-
ns
TIHCK
F/G inputs via H
3.0
-
ns
THH0CK
C inputs via H0 through H
2.8
-
ns
THH1CK
C inputs via H1 through H
2.2
-
ns
THH2CK
C inputs via H2 through H
2.8
-
ns
TDICK
C inputs via DIN
1.2
-
ns
TECCK
C inputs via EC
1.2
-
ns
TRCK
C inputs via S/R, going Low (inactive)
0.8
-
ns
TCCK
CIN input via F/G
2.2
-
ns
TCHCK
CIN input via F/G and H
3.9
-
ns
Hold Time after Clock K
TCKI
F/G inputs
0
-
ns
相关PDF资料 |
PDF描述 |
|---|---|
| XR16M770IL24 | 1 CHANNEL(S), 16M bps, SERIAL COMM CONTROLLER, QCC24 |
| XR16M780IM48 | SERIAL COMM CONTROLLER, PQFP48 |
| XR68C681CJ | XR-68C681CJ PLCC 44 UART 2 CHANELS |
| XS170 | Multifunction Telecom Switch |
| XS170S | Multifunction Telecom Switch |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XQ4013EX-3BG191M | 制造商:XILINX 制造商全称:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013EX-3BG191N | 制造商:XILINX 制造商全称:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013EX-3BG196M | 制造商:XILINX 制造商全称:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013EX-3BG196N | 制造商:XILINX 制造商全称:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013EX-3CB191M | 制造商:XILINX 制造商全称:XILINX 功能描述:QML High-Reliability FPGAs |
发布紧急采购，3分钟左右您将得到回复。