
XRT94L33
xr
Rev.1.2.0.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
428
2.3.4.6
4THE RECEIVE CELL INSERTION BUFFER/PROCESSOR
The Receive ATM Cell Processor block consist of a “Receive Cell Insertion Buffer/Processor” block.
Figure105_ presents the functional block diagram of the Receive ATM Cell Processor block with the Receive Cell
Insertion Buffer/Processor” block highlighted.
Figure 105 Illustration of the Receive ATM Cell Processor block Functional Block Diagram, with the
“Receive Cell Insertion Buffer/Processor” block highlighted
Parity
Calculation
Block
Parity
Calculation
Block
User Cell
Filter
Block
User Cell
Filter
Block
Cell Extraction
Buffer/
Processor
Cell Extraction
Buffer/
Processor
Cell Insertion
Buffer/
Processor
Cell Insertion
Buffer/
Processor
HEC Byte
Verification
Block
HEC Byte
Verification
Block
Cell Payload
De-Scrambler
Block
Cell Payload
De-Scrambler
Block
RxFIFO
Receive UTOPIA
Interface Block
Microprocessor
Interface
Block
Microprocessor
Interface
Block
Idle Cell
Filter
Idle Cell
Filter
Main Data Path
From Receive
STS-3c/STS-12c
POH
Processor Block
Receive GFC
Nibble-Field
Output I/F
Receive GFC
Nibble-Field
Output I/F
The Receive Cell Insertion Buffer/Processor block permits the user to load the contents of an “outbound” ATM
cell into the “Receive Cell Insertion Buffer” via the Microprocessor Interface. Once this cell has been loaded
into the “Receive Cell Insertion Buffer”, then it will be transmitted to the “RxFIFO” where it will ultimately wait
to be read out of the Receive UTOPIA Interface block via the ATM Layer Processor block. This feature can
be very useful for debugging and diagnostics on the “UTOPIA” side of the chip.
The Format of ATM Cell Data that is written into the “Receive Cell Insertion” Buffer
As the user loads the contents of an ATM cell into the “Receive Cell Insertion” Buffer (via the Microprocessor
Interface), they will be expected to write this ATM cell data into a 32 bit wide register/buffer interface. As a
consequence, the user must write in 56-byte size ATM cells into the “Receive Cell Insertion” buffer.
The byte format of this 56 byte ATM cell is as illustrated below in Figure 106.
Figure 106 Byte-Format of the ATM Cell that is to be loaded into the “Receive Cell Insertion” Memory