
XRT94L33
xr
Rev.1.2.0.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
154
Transmit UTOPIA Control Register – Byte 0, Address = 0x0583
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
UTOPIA
Level 3
Disable
Multi-PHY
Mode
Back-to-
Back Polling
Enable
Direct
Status
Access
Transmit UTOPIA/POS-
PHY
Data Bus Width[1:0]
Cell_Size_Sel[1:0]
R/W
X
0
X
1
Setting this bit-field to “0” configures the Transmit UTOPIA Interface block to support “UTOPIA Level 3”
signaling. Conversely, setting this bit-field to “1” configures the Transmit UTOPIA Interface block to support
the “UTOPIA Levels 1 and 2” form of signaling. A description of the operation of the Transmit UTOPIA
Interface block, for UTOPIA Level 1, 2 and 3 operation is presented below.
2.2.1.3
UTOPIA LEVEL 1 AND 2 OPERATION OF THE TRANSMIT UTOPIA INTERFACE BLOCK
This section presents an in-depth write up of the UTOPIA Level 1 and 2 protocols.
When the Transmit UTOPIA Interface block has been configured to operate in the “UTOPIA Level 2” Mode,
then it will either be configured to operate in the “Single-PHY” or “Multi-PHY” mode, as described below.
2.2.1.3.1
Selecting the UTOPIA Data Bus Width
The user can configure the width of the Transmit UTOPIA Data bus to be either 8 or 16 bits by writing the
appropriate data into Bits 3 and 2 (Transmit UTOPIA Data Bus Width[1:0]) within the “Transmit UTOPIA
Control” Register, as depicted below.
Transmit UTOPIA Control Register – Byte 0, Address = 0x0583
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
UTOPIA
Level
Multi-PHY
Mode
Back-to-
Back Polling
Enable
Direct
Status
Access
Transmit UTOPIA
Data Bus Width[1:0]
Cell_Size_Sel[1:0]
R/W
1
0
X
1
If the user chooses a UTOPIA Data Bus width of 8 bits, then only the Transmit UTOPIA Data inputs:
TxUData[15:8] will be active. (The input pins: TxUData[7:0] will not be active). If the user chooses a UTOPIA
Data bus width of 16 bits, then all of the Transmit UTOPIA Data inputs: TxUData[15:0] will be active. The
following table relates the value of Bits 2 and 3 (Transmit UTOPIA Data Bus Width[1:0]) within the Transmit
UTOPIA Control Register, to the corresponding width of the Transmit UTOPIA Data bus.
Note:
This configuration setting does not apply to the Receive UTOPIA Interface block. The user will still need to
specify the width of the Receive UTOPIA Data Bus, separately, as described in Section _.