参数资料
型号: ZL2008ALAFT
厂商: Intersil
文件页数: 28/42页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 36-QFN
标准包装: 100
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.4MHz
占空比: 95%
电源电压: 3 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 36-VFQFN 裸露焊盘
包装: 带卷 (TR)
ZL2008
TABLE 21. Tracking Resistor Settings
R SS
(k Ω )
90.9
100
110
121
133
147
162
178
Track Ratio
(%)
100
50
Upper Track Limit
Limited by target
Limited by VTRK
Limited by target
Limited by VTRK
Ramp-up/down Behavior
Output does not decrease before PG
Output always follows VTRK
Output does not decrease before PG
Output always follows VTRK
Output does not decrease before PG
Output always follows VTRK
Output does not decrease before PG
Output always follows VTRK
It should be noted that current sharing groups that are also
configured to track another voltage do not offer pre-bias
protection; a minimum load should therefore be enforced to
avoid the output voltage from being held up by an outside force.
Additionally, a device set up for tracking must have both
Alternate Ramp Control and Precise Ramp-Up Delay disabled.
V IN
Voltage Margining
The ZL2008 offers a simple means to vary its output higher or
lower than its nominal voltage setting in order to determine
whether the load device is capable of operating over its specified
supply voltage range. The MGN command is set by driving the
MGN pin or through the I 2 C/SMBus interface. The MGN pin is a
tri-level input that is continuously monitored and can be driven
directly by a processor I/O pin or other logic-level output.
GH
Q1
The ZL2008’s output will be forced higher than its nominal set
V TRK
V OUT
ZL
SW
GL
Q2
L1
V OUT
C1
V TRK
point when the MGN command is set HIGH, and the output will
be forced lower than its nominal set point when the MGN
command is set LOW. Default margin limits of V NOM ±5% are
pre-loaded in the factory, but the margin limits can be modified
through the I 2 C/SMBus interface to as high as V NOM + 10% or as
low as 0V, where V NOM is the nominal output voltage set point
determined by the V0 and V1 pins. A safety feature prevents the
user from configuring the output voltage to exceed V NOM + 10%
under any conditions.
The margin limits and the MGN command can both be set
individually through the I 2 C/SMBus interface. Additionally, the
V OUT
transition rate between the nominal output voltage and either
margin limit can be configured through the I 2 C interface. Please
refer to Application Note AN2033 for detailed instructions on
V OUT
Coincident
Ratiometric
FIGURE 20. Tracking Modes
28
Time
V TRK
V OUT
Time
modifying the margining configurations.
I 2 C/SMBus Communications
The ZL2008 provides an I 2 C/SMBus digital interface that
enables the user to configure all aspects of the device operation
as well as monitor the input and output parameters. The ZL2008
can be used with any standard 2-wire I 2 C host device. In addition,
the device is compatible with SMBus version 2.0 and includes an
SALRT line to help mitigate bandwidth limitations related to
continuous fault monitoring. Pull-up resistors are required on the
I 2 C/SMBus as specified in the SMBus 2.0 specification. The
ZL2008 accepts most standard PMBus commands. When
controlling the device with PMBus commands, it is
recommended that the enable pin is tied to SGND.
FN6859.4
April 29, 2011
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ZL2008ALAFT1 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP(0.300",7.62mm) 包装:管件 产品目录页面:1316 (CN2011-ZH PDF)
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