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| 型号： | ZL2008ALAFT |
| 厂商： | Intersil |
| 文件页数： | 30/42页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 36-QFN |
| 标准包装： | 100 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1.4MHz |
| 占空比： | 95% |
| 电源电压： | 3 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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ZL2008
Digital-DC Bus
TABLE 26. Phase Offset Resistor Settings
The Digital-DC Communications (DDC) bus is used to
communicate between Zilker Labs Digital-DC devices. This
dedicated bus provides the communication channel between
devices for features such as sequencing, fault spreading, and
current sharing. The DDC pin on all Digital-DC devices in an
application should be connected together. A pull-up resistor is
required on the DDC bus in order to guarantee the rise time as
follows:
R CFG2
(k Ω )
10
11
12.1
13.3
Phase Offset
(°)
22.5
45
67.5
90
Current
Sense
Rise time = R PU * C LOAD 1μs
(EQ. 35)
14.7
16.2
112.5
135
where R PU is the DDC bus pull-up resistance and C LOAD is the bus
loading. The pull-up resistor may be tied to VR or to an external
3.3V or 5V supply as long as this voltage is present prior to or
during device power-up. As rules of thumb, each device
connected to the DDC bus presents approx 10pF of capacitive
loading, and each inch of FR4 PCB trace introduces approx 2pF.
The ideal design will use a central pull-up resistor that is well-
matched to the total load capacitance. In power module
applications, the user should consider whether to place the pull-
up resistor on the module or on the PCB of the end application.
The minimum pull-up resistance should be limited to a value that
enables any device to assert the bus to a voltage that will ensure
a logic 0 (typically 0.8V at the device monitoring point) given the
pull-up voltage (5V if tied to VR) and the pull-down current
capability of the ZL2008 (nominally 4mA).
Phase Spreading
When multiple point of load converters share a common DC
input supply, it is desirable to adjust the clock phase offset of
each device such that not all devices start to switch
simultaneously. Setting each converter to start its switching cycle
at a different point in time can dramatically reduce input
capacitance requirements and efficiency losses. Since the peak
current drawn from the input supply is effectively spread out over
a period of time, the peak current drawn at any given moment is
reduced and the power losses proportional to the I RMS2 are
reduced dramatically.
In order to enable phase spreading, all converters must be
synchronized to the same switching clock. The CFG1 pin is used
to set the configuration of the SYNC pin for each device as
described in section “Switching Frequency and PLL” on page 17 .
The phase offset of each single-phase device may be set to any
value between 0° and 337.5° in 22.5° increments using the
CFG2 pin as shown in Tables 25 and 26.
17.8
19.6
21.5
23.7
26.1
28.7
31.6
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
75
82.5
90.9
100
110
121
133
147
162
157.5
180
202.5
225
247.5
270
292.5
315
337.5
22.5
45
67.5
90
112.5
135
157.5
180
202.5
225
247.5
270
292.5
315
337.5
DCR
RDS
TABLE 25. Phase Offset Pin-strap Settings
The phase offset of (multi-phase) current sharing devices is
R CFG2
LOW
OPEN
HIGH
Phase Offset
(°)
90
0
180
30
Current Sense
DCR
automatically set to a value between 0° and 337.5° in 22.5°
The phase offset of each device may also be set to any value
between 0° and 360° in 22.5° increments via the I 2 C/SMBus
interface. Refer to Application Note AN2033 for further details.
FN6859.4
April 29, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL2008ALAFT1 | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ZL2008ALBFT | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ZL2008ALBFT1 | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ZL2008EVAL1Z | 功能描述:EVALUATION BOARD FOR ZL2008 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ZL20200 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:Dual Band IS136/AMPS Transceiver |
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