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| 型号： | 7549 |
| 厂商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 单芯片8位CMOS微机 |
| 文件页数： | 54/73页 |
| 文件大小： | 1272K |
| 代理商： | 7549 |
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Rev.2.00
REJ03B0202-0200
Mar 05, 2007
Page 54 of 70
7549 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
NOTES ON USE
Countermeasures against noise
It is necessary not only design the system taking measures
against the noise as follows but to evaluate before actual use.
1. Shortest wiring length
(1) Package
Select the smallest possible package to make the total wiring
length short.
<Reason>
The wiring length depends on a microcomputer package. Use of
a small package, for example QFP and not DIP, makes the total
wiring length short to reduce influence of noise.
Fig 69. Selection of packages
(2) Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin
as short as possible. Especially, connect a capacitor across the
RESET pin and the V
SS
pin with the shortest possible wiring
(within 20mm).
<Reason>
The width of a pulse input into the RESET pin is determined by
the timing necessary conditions. If noise having a shorter pulse
width than the standard is input to the RESET pin, the reset is
released before the internal state of the microcomputer is
completely initialized. This may cause a program runaway.
Fig 70. Wiring for the RESET pin
(3) Wiring for clock input/output pins
Make the length of wiring which is connected to clock I/O
pins as short as possible.
Make the length of wiring (within 20 mm) across the
grounding lead of a capacitor which is connected to an
oscillator and the V
SS
pin of a microcomputer as short as
possible.
Separate the V
SS
pattern only for oscillation from other
V
SS
patterns.
<Reason>
If noise enters clock I/O pins, clock waveforms may be
deformed. This may cause a program failure or program
runaway. Also, if a potential difference is caused by the noise
between the V
SS
level of a microcomputer and the V
SS
level of
an oscillator, the correct clock will not be input in the
microcomputer.
Fig 71. Wiring for clock I/O pins
(4) Wiring to CNV
SS
pin
Connect CNV
SS
pin to a GND pattern at the shortest distance.
The GND pattern is required to be as close as possible to the
GND supplied to V
SS
.
In order to improve the noise reduction, to connect a 5 k
resistor serially to the CNV
SS
pin - GND line may be valid.
As well as the above-mentioned, in this case, connect to a GND
pattern at the shortest distance. The GND pattern is required to
be as close as possible to the GND supplied to V
SS
.
<Reason>
The CNV
SS
pin of the QzROM is the power source input pin for
the built-in QzROM. When programming in the built-in
QzROM, the impedance of the CNV
SS
pin is low to allow the
electric current for writing flow into the QzROM. Because of
this, noise can enter easily. If noise enters the CNV
SS
pin,
abnormal instruction codes or data are read from the built-in
QzROM, which may cause a program runaway.
Fig 72. Wiring for the V
PP
pin of the QzPROM
DIP
SDIP
SOP
QFP
RESET
Reset
circuit
Noise
V
SS
V
SS
N.G.
Reset
circuit
V
SS
RESET
V
SS
O.K.
Noise
X
IN
X
OUT
V
SS
N.G.
X
IN
X
OUT
V
SS
O.K.
CNV
SS
V
SS
About 5k
The shortest
The shortest
(Note)
(Note)
Note: This indicates pin.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 7549_0710 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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