参数资料
| 型号： | AD9852ASVZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 36/52页 |
| 文件大小： | 0K |
| 描述： | IC DDS SYNTHESIZER CMOS 80-TQFP |
| 产品培训模块： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 标准包装： | 1 |
| 分辨率（位）： | 12 b |
| 主 fclk： | 300MHz |
| 调节字宽（位）： | 48 b |
| 电源电压： | 3.14 V ~ 3.47 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-TQFP 裸露焊盘 |
| 供应商设备封装： | 80-TQFP-EP（12x12） |
| 包装： | 托盘 |
| 配用： | AD9852/PCBZ-ND - BOARD EVAL FOR AD9852 |
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AD9852
Rev. E | Page 41 of 52
EVALUATION BOARD
An evaluation board is available that supports the AD9852 DDS
device. This evaluation board consists of a PCB, software, and
documentation to facilitate bench analysis of the performance of
the AD9852 device. It is recommended that users of the AD9852
familiarize themselves with the operation and performance
capabilities of the device by using the evaluation board. The
evaluation board should also be used as a PCB reference design
to ensure optimum dynamic performance from the device.
EVALUATION BOARD INSTRUCTIONS
The AD9852/AD9854 Rev. E evaluation board includes either
an AD9852ASVZ or AD9854ASVZ IC.
The ASVZ package permits 300 MHz operation by virtue of its
thermally enhanced design. This package has a bottom-side
heat slug that must be soldered to the ground plane of the
PCB directly beneath the IC. In this manner, the evaluation
board PCB ground plane layer extracts heat from the AD9852
or AD9854 IC package. If device operation is limited to 200 MHz
or less, the ASTZ package can be used without a heat slug in
customer installations over the full temperature range.
Evaluation boards for both the AD9852 and AD9854 are
identical except for the installed IC.
To assist in proper placement of the pin header shorting
jumpers, the instructions refer to direction (left, right, top,
bottom) as well as header pins to be shorted. Pin 1 for each
3-pin header is marked on the PCB corresponding with the
schematic diagram. When following these instructions, position
the PCB so that the PCB text can be read from left to right. The
board is shipped with the pin headers configuring the board as
follows:
REFCLK for the AD9852 or AD9854 is configured as
differential. The differential clock signals are provided by
the MC100LVEL16D differential receiver.
Input clock for the MC100LVEL16D is single ended via
J25. This signal may be 3.3 V CMOS or a 2 V p-p sine wave
capable of driving 50 Ω (R13).
Both DAC outputs from the AD9852 or AD9854 are
routed through the two 120 MHz elliptical LP filters, and
their outputs are connected to J7 (Q, or control DAC) and
J6 (I , or cosine DAC).
The board is set up for software control via the printer port
connector.
The output currents of the DAC are configured for 10 mA.
GENERAL OPERATING INSTRUCTIONS
Load the CD software onto the PC’s hard disk. Connect a
printer cable from the PC to the AD9852 evaluation board
printer port connector labeled J11. The current software
(Version 1.72) supports Windows 95 or better operating
systems.
Hardware Preparation
Using the schematic in conjunction with these instructions
helps acquaint the user with the electrical functioning of the
evaluation board.
Attach power wires to the connector labeled TB1 using the
screw-down terminals. This is a plastic connector that press-fits
over a 4-pin header soldered to the board. Table 14 lists the
connections to each pin.
Table 14. Power Requirements for DUT Pins1
AVDD 3.3 V
DVDD 3.3 V
VCC 3.3 V
Ground
All DUT
analog pins
All DUT
digital pins
All other
devices
All devices
1 DUT = device under test.
Clock Input, J25
Attach REFCLK to the clock input, J25. This is a single-ended
input that is routed to the MC100LVEL16D for conversion to
differential PECL output. This is accomplished by attaching a 2
V p-p clock or sine wave source to J25. This is a 50 Ω impedance
point set by R13. The input signal is ac-coupled and then biased
to the center-switching threshold of the MC100LVEL16D. To
engage the differential clocking mode of the AD9852, Pin 2 and
Pin 3 (the bottom two pins) of W3 must be connected with a
shorting jumper.
The signal arriving at the AD9852 is called the reference clock.
If the user chooses to engage the on-chip PLL clock multiplier,
this signal is the reference clock for the PLL and the multiplied
PLL output becomes the system clock. If the user chooses to bypass
the PLL clock multiplier, the reference clock that has been supplied
is directly operating the AD9852 and is therefore the system clock.
Three-State Control
Three of the following control or switch headers must be
shorted to allow the provided software to control the evaluation
board via Printer Port Connector J11: W9, W11, W12, W13,
W14, and W15.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9854ASTZ | IC DDS QUADRATURE CMOS 80-LQFP |
| AD9858BSVZ | IC DDS DAC 10BIT 1GSPS 100-TQFP |
| AD9859YSVZ-REEL7 | IC DDS DAC 10BIT 400MSPS 48TQFP |
| AD9880KSTZ-100 | IC INTERFACE/HDMI 100MHZ 100LQFP |
| AD9882KSTZ-140 | IC INTERFACE/DVI 100MHZ 100LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9852ASVZ | 制造商:Analog Devices 功能描述:IC DDS 300MHz TQFP-80 制造商:Analog Devices 功能描述:IC, DDS, 300MHz, TQFP-80 |
| AD9852ASVZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:CMOS 300 MSPS Complete DDS |
| AD9852BSVZ | 制造商:Analog Devices 功能描述: |
| AD9853 | 制造商:AD 制造商全称:Analog Devices 功能描述:Programmable Digital OPSK/16-QAM Modulator |
| AD9853-45PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Programmable Digital OPSK/16-QAM Modulator |
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