参数资料
| 型号： | AD9974BBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/52页 |
| 文件大小： | 0K |
| 描述： | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，14 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 55mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LFBGA，CSPBGA |
| 供应商设备封装： | 100-CSBGA（9x9） |
| 包装： | 标准包装 |
| 其它名称： | AD9974BBCZRLDKR |
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AD9974
Rev. A | Page 23 of 52
HBLK Mode 2 Operation
HBLK Mode 2 allows more advanced HBLK pattern operation.
If unevenly spaced HCLK pulses in multiple areas are needed,
HBLK Mode 2 can be used. Using a separate set of registers,
HBLK Mode 2 can divide the HBLK region into up to six repeat
shares a common group of toggle positions, HBLKSTARTA,
HBLKSTARTB, and HBLKSTARTC. However, the number of
toggles following each start position can be unique in each
repeat area by using the RAH1REP and RAH2REP registers.
As shown in Figure 30, setting the RAH1REPA/RAH1REPB/
RAH1REPC or RAH2REPA/RAH2REPB/RAH2REPC registers
to 0 masks HCLK groups from appearing in a particular repeat
area. Figure 31 shows only two repeat areas being used, although
six are available. It is possible to program a separate number of
repeat area repetitions for H1 and H2, but generally the same
value is used for both H1 and H2.
Figure 31 shows the following example:
RA0H1REPA/RA0H1REPB/RA0H1REPC =
RA0H2REPA/RA0H2REPB/RA0H2REPC =
RA1H1REPA/RA1H1REPB/RA1H1REPC =
RA1H2REPA/RA1H2REPB/RA1H2REPC = 2.
Furthermore, HBLK Mode 2 allows a different HBLK pattern
on even and odd lines. The HBLKSTARTA, HBLKSTARTB, and
HBLKSTARTC registers, as well as the RAH1REPA/RAH1REPB/
RAH1REPC and RAH2REPA/RAH2REPB/RAH2REPC registers,
define operation for the even lines. For separate control of the
odd lines, the HBLKALT_PAT registers specify up to six repeat
areas on the odd lines by reordering the repeat areas used for the
even lines. New patterns are not available, but the order of the
previously defined repeat areas on the even lines can be changed
for the odd lines to accommodate advanced CCD operation.
H1
H2
HBLKSTART
A
HBLKEND
REPEAT AREA 0
HD
B
C
REPEAT AREA 1
REPEAT AREA 2
REPEAT AREA 3
REPEAT AREA 4
REPEAT AREA 5
MASK A, B, C PULSES IN ANY REPEAT
AREA BY SETTING RA*H*REP* = 0
CHANGE NUMBER OF A, B, C PULSES IN ANY
REPEAT AREA USING RA*H*REP* REGISTERS
CREATE UP TO 3 GROUPS OF TOGGLES
A, B, C COMMON IN ALL REPEAT AREAS
0
5
955
-03
0
Figure 30. HBLK Mode 2 Operation
HBLK
H1
H2
HBLKSTART
HBLKSTARTA
HBLKEND
HBLKLEN
REPEAT AREA 0
HBLKREP = 2
TO CREATE 2 REPEAT AREAS
HD
REPEAT AREA 1
HBLKSTARTB
HBLKSTARTC
RA0H1REPA RA0H1REPB
RA0H1REPC
ALL RA*H*REPA, B, C REGISTERS = 2, TO CREATE 2 HCLK PULSES
RA1H1REPA RA1H1REPB
RA1H1REPC
RA0H2REPA RA0H2REPB
RA0H2REPC
RA1H2REPA RA1H2REPB
RA1H2REPC
0595
5-
0
31
Figure 31. HBLK Mode 2 Registers
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相关代理商/技术参数 |
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| AD9975 | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABST | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTEB | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
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