参数资料
| 型号： | AD9974BBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 39/52页 |
| 文件大小： | 0K |
| 描述： | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，14 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 55mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LFBGA，CSPBGA |
| 供应商设备封装： | 100-CSBGA（9x9） |
| 包装： | 标准包装 |
| 其它名称： | AD9974BBCZRLDKR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页当前第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页
AD9974
Rev. A | Page 44 of 52
Table 25. I/O Control Registers
Address
Data Bit
Content
Default
Value
Update
Name
Description
0x23
[0]
0
SCK
TESTMODE
Test Operation Only. Set to 0.
[1]
0
TESTMODE
Test Operation Only. Set to 0.
[2]
0
IO_NVR
IOVDD Voltage Range for VD, HD, SCK, SDATA, and SL.
0 = 1.8 V.
1 = 3.3 V.
The I/Os are 3 V tolerant, so there is no problem having higher
than 1.8 V inputs at start-up, but this register should be set to 1
at initialization if using higher than 1.8 V supplies.
[3]
0
DATA_NVR
DRVDD Voltage Range.
[4]
0
TESTMODE
Test Operation Only. Set to 0.
[7:5]
1
HCLKMODE
Selects HCLK output configuration (see Table 9).
[27:8]
Unused
Set unused bits to 0.
0x24
[27:0]
0
TESTMODE
Test Operation Only. Set to 0 if this register is accessed.
0x25
[27:0]
0
TESTMODE
Test Operation Only. Set to 0 if this register is accessed.
0x26
[27:0]
0
TESTMODE
Test Operation Only. Set to 0 if this register is accessed.
0x27
[27:0]
0
TESTMODE
Test Operation Only. Set to 0 if this register is accessed.
Table 26. Mode Registers
Address
Data Bit
Content
Default
Value
Update
Name
Description
0x28
[4:0]
0
VD
HPATNUM
Total Number of H-Pattern Groups.
[27:5]
Unused
Set unused bits to 0.
0x29
[27:0]
Unused
Set unused register to 0 if accessed.
0x2A
[2:0]
0
VD
FIELDNUM
Total Number of Fields. Set to 1 for single-field operation.
[27:3]
Unused
Set unused bits to 0.
0x2B
[4:0]
0
VD
FIELD_SEL1
Selected First Field.
[9:5]
0
VD
FIELD_SEL2
Selected Second Field.
[14:10]
0
FIELD_SEL3
Selected Third Field.
[19:15]
0
FIELD_SEL4
Selected Fourth Field.
[24:20]
0
FIELD_SEL5
Selected Fifth Field.
[27:25]
Unused
Set unused bits to 0.
0x2C
[4:0]
0
VD
FIELD_SEL6
Selected Sixth Field.
[9:5]
0
FIELD_SEL7
Selected Seventh Field.
[27:10]
Unused
Set unused bits to 0.
0x2D
[27:0]
SCK
Unused
Set unused register to 0 if this register is accessed.
0x2E
[27:0]
SCK
Unused
Set unused register to 0 if this register is accessed.
0x2F
[27:0]
SCK
Unused
Set unused register to 0 if this register is accessed.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9979BCPZRL | IC PROCESSOR CCD 14BIT 48-LFCSP |
| AD9980KSTZ-95 | IC INTERFACE 8BIT ANALOG 80LQFP |
| AD9981KSTZ-95 | IC INTERFACE 10BIT ANALOG 80LQFP |
| AD9983AKSTZ-170 | IC DISPLAY 8BIT 170MSPS 80LQFP |
| AD9985KSTZ-140 | IC INTERFACE 8BIT 140MSPS 80LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9975 | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABST | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTEB | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTRL | 制造商:AD 制造商全称:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10 BIT ANALOG FRONT END WITH HALF DUPLEX - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。