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| 型号： | ADAU1445YSVZ-3A-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 74/92页 |
| 文件大小： | 0K |
| 描述： | IC SIGMADSP 175MHZ 100TQFP |
| 标准包装： | 1,000 |
| 系列： | SigmaDSP® |
| 类型： | 音频处理器 |
| 应用： | 车载音频 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP 裸露焊盘 |
| 供应商设备封装： | 100-TQFP-EP（14x14） |
| 包装： | 带卷 (TR) |
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ADAU1445/ADAU1446
Rev. A | Page 76 of 92
SERIAL OUTPUT FLEXIBLE TDM INTERFACE
MODES AND SETTINGS
The flexible TDM mode used on the SDATA_IN[1:0] serial
input ports can also be used on the SDATA_OUT[1:0] serial
output ports. There are 24 output channels available to the
output ports in flexible TDM mode.
For this mode to be active, the word length bits of the corre-
sponding serial ports must be set to 11 (TDM8 or flexible TDM).
In flexible TDM mode, each flexible TDM stream includes
32 bytes (slots) of information for every frame on the frame
clock. Combining the two serial output ports allows for a total
of 64 bytes in the flexible stream.
It is important to note that, unlike in the FARM, where signals
must be routed as stereo pairs, the output channels can be
individually assigned to different places on the flexible TDM
stream. Each of the 64 TDM output slots is capable of taking its
data from any of these 24 output channels, as long as data
retrieval starts with Output Channel 0 and increases
sequentially.
Because the audio data can be input in 8-, 16-, or 24-bit
formats, a single channel of audio data may occupy more than
one slot. An 8-bit audio channel occupies one slot, a 16-bit
audio channel occupies two slots, and a 24-bit audio channel
occupies three slots. To set up each slot, the supplying channel
(Input Channels[23:0]) and byte position (most significant,
middle, or least significant) must be set in the corresponding
TDM slot register. An example of the flexible TDM interface
mode on the output side is shown in Figure 58.
In this example, three monochannels of audio are sent from the
output channels to a flexible TDM stream. Output Channel 0 is
8 bits, Output Channel 1 is 16 bits, and Output Channel 2 is
24 bit. The target slots are set up accordingly. Slot 3 is set to
output the most significant (MS) byte of Output Channel 0, or
the eight MSBs. Slot 11 is set to output the most significant
(MS) byte of Output Channel 1, and Slot 12 is set to output the
middle (M) byte; therefore, together Slot 11 and Slot 12 output
the 16 MSBs of data from Output Channel 1. Slot 42, Slot 43,
and Slot 44 are set to output the most significant (MS), middle
(M), and least significant (LS) bytes, respectively, of Output
Channel 2, thus accounting for all 24 bits. The flexibility of the
system allows for any order or combination of slots to be used
for any channel, but most applications follow a sequential MS,
M, LS format. Note that any output channel can be assigned to
any slot, as long as assignment begins with Output Channel 0
and increases sequentially. This is done to ensure compatibility
with the automatic output channel assignment (see the
Automatic Output Channel Assignment section).
Two slots are contained within each register. The upper eight
bits control the higher slot, and the lower eight bits control the
lower slot. For example, in Register 0xE1C0 (SDATA_OUT0)
TDM Slot 0 and TDM Slot 1, Bits[15:8] control TDM Slot 1,
and Bits[7:0] control TDM Slot 0.
A special condition applies to Slot 31 and Slot 63. These two
slots can only be used to hold the MS byte of an 8-bit channel
and cannot be used in conjunction with other slots to hold
more than eight bits of data.
The default setting of all 16 bits high (0xFFFF) indicates that the
channel is configured in the standard serial input interface mode
and does not use the flexible TDM interface mode.
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
0123456789
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
31
0
32
63
...
FRAME
SDATA_OUT0
LRCLKx
SDATA_OUT1
07
69
6-
0
58
Figure 57. Flexible TDM Interface Mode—Output Streams
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADAU1446EBZ | 制造商:Analog Devices 功能描述:SIGMADSP? DIGITAL AUDIO PROCESSOR WITH FLEXIBLE AUDIO - Bulk |
| ADAU1446YSTZ-3A | 功能描述:IC SIGMADSP 175MHZ 100LQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 音频处理 系列:SigmaDSP® 其它有关文件:STA321 View All Specifications 标准包装:1 系列:Sound Terminal™ 类型:音频处理器 应用:数字音频 安装类型:表面贴装 封装/外壳:64-LQFP 裸露焊盘 供应商设备封装:64-LQFP EP（10x10） 包装:Digi-Reel® 其它名称:497-11050-6 |
| ADAU1446YSTZ-3A-RL | 功能描述:IC SIGMADSP 175MHZ 100LQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 音频处理 系列:SigmaDSP® 其它有关文件:STA321 View All Specifications 标准包装:1 系列:Sound Terminal™ 类型:音频处理器 应用:数字音频 安装类型:表面贴装 封装/外壳:64-LQFP 裸露焊盘 供应商设备封装:64-LQFP EP（10x10） 包装:Digi-Reel® 其它名称:497-11050-6 |
| ADAU1450WBCPZ | 功能描述:IC AUDIO PROCESSOR 72LFCSP 制造商:analog devices inc. 系列:SigmaDSP? 包装:托盘 零件状态:有效 类型:Sigma 接口:I2C，SPI 时钟速率:147.456MHz 非易失性存储器:- 片载 RAM:64KB 电压 - I/O:3.3V 电压 - 内核:1.20V 工作温度:-40°C ~ 105°C（TA） 安装类型:表面贴装 封装/外壳:72-VFQFN 裸露焊盘，CSP 供应商器件封装:72-LFCSP-VQ（10x10） 标准包装:1 |
| ADAU1450WBCPZ-RL | 功能描述:IC AUDIO PROCESSOR 72LFCSP 制造商:analog devices inc. 系列:SigmaDSP? 包装:剪切带（CT） 零件状态:在售 类型:Sigma 接口:I2C，SPI 时钟速率:147.456MHz 非易失性存储器:- 片载 RAM:64KB 电压 - I/O:3.30V 电压 - 内核:1.20V 工作温度:-40°C ~ 105°C（TA） 安装类型:表面贴装 封装/外壳:72-VFQFN 裸露焊盘，CSP 供应商器件封装:72-LFCSP-VQ（10x10） 标准包装:1 |
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