参数资料
| 型号： | ADE7116ASTZF8 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 110/152页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER 64-LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 160 |
| 输入阻抗： | 770 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 4mA |
| 电源电压： | 2.4 V ~ 3.7 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
ECON
COMMAND
ADDRESS
EADRH EADRL
ADDRESS
DECODER
PROTECTION
DECODER
ACCESS
ALLOWED?
TRUE: ACCESS
ALLOWED
ECON = 0
FLASH
PROTECTION KEY
FLSHKY
FLSHKY = 0 × 3B?
FALSE: ACCESS
DENIED
ECON = 1
Figure 95. Flash Memory Read/Write/Erase Protection Block Diagram
ECON—Flash Control SFR
Programming flash memory is done through the Flash Control
SFR (ECON, Address 0xB9). This SFR allows the user to read,
write, erase, or verify the 16 kB of flash memory. As a method of
security, a key must be written to the FLSHKY, Address 0xBA)
to initiate any user access to the flash memory. Upon completion
of the flash memory operation, the FLSHKY SFR is reset such that
it must be written to before another flash memory operation.
Requiring the key to be set before an access to the flash memory
decreases the likelihood of user code or data being overwritten
by a runaway program.
Table 102. Flash Control SFR (ECON, Address 0xB9)
The program counter, PC, is held on the instruction where the
ECON SFR is written to until the flash memory controller is
done performing the requested operation. Then, the PC
increments to continue with the next instruction.
Any interrupt requests that occur while the flash controller is
performing an operation are not handled until the flash operation
is complete. All peripherals, such as timers and counters, continue
to operate as configured throughout the flash memory access.
Bit
[7:0]
Mnemonic
ECON
Default
0
Value
1
Description
Write byte. The value in EDATA is written to the flash memory at the page address given by
EADRH (Address 0xC7) and EADRL (Address 0xC6). Note that the byte being addressed must be
pre-erased.
2
3
4
5
8
Erase page. A 512-byte page of flash memory address is erased. The page is selected by the
address in EADRH and EADRL. Any address in the page can be written to EADRH and EADRL to
select it for erasure.
Erase all. All 16 kB of the available flash memory are erased. Note that this command is used
during serial mode and parallel download mode but should not be executed by user code.
Read byte. The byte in the flash memory addressed by EADRH/EADRL is read into EDATA.
Erase Page and Write Byte. The page that holds the byte addressed by EADRH/EADRL is erased.
Data in EDATA is then written to the byte of flash memory addressed by EADRH/EADRL.
Protect code (see the Protecting the Flash section).
Table 103. Flash Key SFR (FLSHKY, Address 0xBA)
Bit
[7:0]
Mnemonic
FLSHKY
Default
0xFF
Description
The content of this SFR is compared to the flash key, 0x3B. If the two values match, the next ECON
operation is allowed (see the Protecting the Flash section).
Table 104. Flash Protection Key SFR (PROTKY, Address 0xBB)
Bit
[7:0]
Mnemonic
PROTKY
Default
0xFF
Description
The content of this SFR is compared to the flash memory location at Address 0x3FFA. If the two values
match, the update of the write/erase and read protection setup is allowed (see the Protecting the Flash
section).
If the protection key in the flash is 0xFF, the PROTKY SFR value is not used for comparison. This SFR is
also used to write the protection key in the flash. This is done by writing the desired value in PROTKY
and by writing 0x08 in the ECON SFR. This operation can only be done once.
Table 105. Flash Data SFR (EDATA, Address 0xBC)
Bit
[7:0]
Mnemonic
EDATA
Default
0
Description
Flash pointer data.
Rev. B | Page 110 of 1 52
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