参数资料
型号: ADE7116ASTZF8
厂商: Analog Devices Inc
文件页数: 38/152页
文件大小: 0K
描述: IC ENERGY METER 64-LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 160
输入阻抗: 770 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2V
电压 - 低输入/输出: 0.8V
电流 - 电源: 4mA
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
3.3 V PERIPHERALS AND WAKE-UP EVENTS
Some of the 3.3 V peripherals are capable of waking the ADE7116/
ADE7156/ADE7166/ADE7169/ADE7566/ADE7569 from PSM2
mode. The events that can cause the devices to wake up from
PSM2 mode are listed in the Wake-Up Event column in Table 29.
Table 29. 3.3 V Peripherals and Wake-Up Events
Wake-
The interrupt flag associated with these events must be cleared
prior to executing instructions that put the ADE7116/ADE7156/
ADE7166/ADE7169/ADE7566/ADE7569 in PSM2 mode after
wake-up.
3.3 V
Up
Wake-Up
Interrupt
Peripheral
Temperature
Event
?T
Enable Bits
Maskable
Flag
Vector
Comments
The temperature ADC can wake up the ADE7156/ADE7166/
ADC
ADE7169/ADE7566/ADE7569. A pending interrupt is generated
according to the description in the Temperature Measurement
section. This wake-up event can be disabled by disabling temperature
measurements in the temperature and supply delta SFR (DIFFPROG,
Address 0xF3) in PSM2 mode. The temperature interrupt needs to be
serviced and acknowledged prior to entering PSM2 mode.
V DCIN ADC
ΔV
Maskable
FVADC
IPSM
The V DCIN measurement can wake up the ADE7156/ADE7166/
ADE7169/ADE7566/ADE7569. FVADC is set according to the
description in the External Voltage Measurement section. This wake-
up event can be disabled by clearing EVADC in the power manage-
ment interrupt enable SFR (IPSME, Address 0xEC); see Table 21. The
FVADC flag needs to be cleared prior to entering PSM2 mode.
Power Supply
PSR
Nonmaskable
PSR
IPSM
The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569 wake
Management
up if the power supply is restored (if V SWOUT switches to be connected
to V DD ). The VSWSOURCE flag, Bit 6 of the peripheral configuration SFR
(PERIPH, Address 0xF4), is set to indicate that V SWOUT is connected to V DD .
RTC
Midnight
Nonmaskable
Midnight
IRTC
The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
wake up at midnight every day to update their calendars. The RTC
interrupt needs to be serviced and acknowledged prior to entering
PSM2 mode.
Alarm
Maskable
ALARM
IRTC
An alarm can be set to wake the ADE7116/ADE7156/ADE7166/
ADE7169/ADE7566/ADE7569 after the desired amount of time. The
RTC alarm is enabled by setting the ALARM bit in the RTC configur-
ation SFR (TIMECON, 0xA1). The RTC interrupt needs to be serviced
and acknowledged prior to entering PSM2 mode.
I/O Ports 1
INT0
INT0PRG = 1
IE0
The edge of the interrupt is selected by the IT0 bit in the TCON SFR
(TCON, Address 0x88). The IE0 flag bit in the TCON SFR is not affected.
The Interrupt 0 interrupt needs to be serviced and acknowledged
prior to entering PSM2 mode.
INT1
INT1PRG = 11x
IE1
The edge of the interrupt is selected by the IT1 bit in the TCON SFR
(TCON, Address 0x88). The IE1 flag bit in the TCON SFR is not affected.
The Interrupt 1 interrupt needs to be serviced and acknowledged
prior to entering PSM2 mode.
Rx Edge
RXPROG[1:0] =
11
PERIPH[7]
(RXFG)
An Rx edge event occurs if a rising or falling edge is detected on the
Rx line. The UART RxD flag needs to be cleared prior to entering
PSM2 mode.
External
Reset
RESET
Nonmaskable
If the RESET pin is brought low while the ASE7116/ADE7156/
ADE7166/ADE7169/ADE7566/ADE7569 are in PSM2 mode, they
wake up to PSM1 mode.
LCD
Scratch Pad
The LCD can be enabled/disabled in PSM2 mode. The LCD data
memory remains intact.
The four SCRATCHx registers remain intact in PSM2 mode.
1
All I/O pins are treated as inputs. The weak pull-up on each I/O pin can be disabled individually in the Port 0 weak pull-up enable SFR (PINMAP0, Address 0xB2), Port 1
weak pull-up enable SFR (PINMAP1, Address 0xB3), and Port 2 weak pull-up enable SFR (PINMAP2, Address 0xB4) to decrease current consumption. The interrupts can
be enabled or disabled.
Rev. B | Page 38 of 152
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