参数资料
型号: ADE7116ASTZF8
厂商: Analog Devices Inc
文件页数: 29/152页
文件大小: 0K
描述: IC ENERGY METER 64-LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 160
输入阻抗: 770 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2V
电压 - 低输入/输出: 0.8V
电流 - 电源: 4mA
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
POWER MANAGEMENT
The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/
ADE7569 have elaborate power management circuitry that
manages the switchover from regular power supply to battery
Table 16. Power Management SFRs
and manages power supply failures. The power management
functionalities can be accessed directly through the 8052 SFRs
(see Table 16).
SFR Address
0xEC
0xF5
0xF8
0xFF
0xF4
0xC5
0xFB
0xFC
0xFD
0xFE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mnemonic
IPSME
BATPR
IPSMF
INTPR
PERIPH
POWCON
SCRATCH1
SCRATCH2
SCRATCH3
SCRATCH4
Description
Power management interrupt enable (see Table 21).
Battery switchover configuration (see Table 19).
Power management interrupt flag (see Table 18).
Interrupt pins configuration (see Table 17).
Peripheral configuration (see Table 20).
Power control (see Table 26).
Scratch Pad 1 (see Table 22).
Scratch Pad 2 (see Table 23).
Scratch Pad 3 (see Table 24).
Scratch Pad 4 (see Table 25).
POWER MANAGEMENT REGISTER DETAILS
Table 17. Interrupt Pins Configuration SFR (INTPR, Address 0xFF)
Bit
7
Mnemonic
RTCCAL
Default
0
Description
Controls RTC calibration output. When set, the RTC calibration frequency selected by the FSEL bits is
output on the P0.2/CF1/RTCCAL pin.
[6:5]
4
[3:1]
0
FSEL
Reserved
INT1PRG
INT0PRG
00
N/A
000
0
Sets RTC calibration output frequency and calibration window.
FSEL
Result (Calibration Window, Frequency)
00
30.5 sec, 1 Hz
01
30.5 sec, 512 Hz
10
0.244 sec, 500 Hz
11
0.244 sec, 16 kHz
Controls the function of INT1.
INT1PRG
Result
X00
GPIO enabled
X01
BCTRL enabled
01X
INT1 input disabled
11X
INT1 input enabled
Controls the function of INT0.
INT0PRG
Result
0
INT0 input disabled
1
INT0 input enabled
Writing to the Interrupt Pins Configuration SFR (INTPR, Address 0xFF)
To protect the RTC from runaway code, a key must be written to the key SFR (KYREG, Address 0xC1) to obtain write access to INTPR.
KYREG (see Table 126) should be set to 0xEA to unlock this SFR and reset to 0 after a timekeeping register is written to. The RTC
registers can be written using the following 8052 assembly code:
MOV
MOV
KYREG, #0EAh
INTPR, #080h
Rev. B | Page 29 of 152
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