参数资料
型号: ADP1048ARQZ-R7
厂商: Analog Devices Inc
文件页数: 25/84页
文件大小: 0K
描述: IC DGTL PFC CTRLR 24QSOP
标准包装: 1
模式: 平均电流
频率 - 开关: 30kHz ~ 400kHz
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 标准包装
其它名称: ADP1048ARQZ-R7DKR

Data Sheet
POWER SUPPLY SYSTEM AND FAULT MONITORING
ADP1047/ADP1048
The ADP1047 / ADP1048 have extensive system and fault mon-
itoring capabilities. The system monitoring functions include
voltage, current, power, and temperature readings. The fault
conditions include out of limit for current, voltage, power, and
temperature. The limits for the fault conditions are programmable.
An extensive set of flags is set when certain thresholds or limits
are exceeded. These flags are described in Table 11 and Table 12.
FLAG CONVENTIONS
A flag indicates a fault condition; therefore, a flag is set (equal to
1, or high) when the fault or bad condition occurs. Good flags,
such as POWER_GOOD# and AC_OK, are active low flags. For
example, POWER_GOOD# = 1 indicates a problem.
Note that the signals relative to a flag are active high. For
example, if the POWER_GOOD# flag is set to 1, the PGOOD
pin is at Logic Level 0 because the POWER_GOOD# flag is
inverted at the pin to provide active high signals.
MANUFACTURER-SPECIFIC FLAGS
The manufacturer-specific flags are flags that are not covered by
the PMBus specification. Some flags simply indicate a condition
(typically, warning flags). The response to some of the flags is
individually programmable (typically, fault flags).
There is also a set of latched fault registers. These registers con-
tain the same flags, but the flags remain set to allow users to detect
an intermittent fault. Reading a latched register resets the flags
in that register. The latched fault registers are Register 0xFE80,
Register 0xFE81, and Register 0xFE82.
Table 11. Summary of Manufacturer-Specific Flags
Bit Name
MAX_MODULATION
MIN_MODULATION
OLP
Address
0xFE80[7]
0xFE80[6]
0xFE80[5]
Description (1 = Flag Set)
The maximum modulation limit is reached.
The minimum modulation limit is reached.
Signals a difference of more than ~100 mV between the VFB and OVP signals
Action
Programmable
(one of the two voltage dividers is probably disconnected or malfunctioning).
FAST_OVP
AC_PERIOD
0xFE80[4]
0xFE80[3]
The threshold set for the comparator on the OVP pin has been crossed.
The controller is not able to detect the ac line period; the maximum value of
Programmable
the period is used and this flag is set.
BROWN_OUT
SOFT_START
INRUSH
0xFE80[2]
0xFE80[1]
0xFE80[0]
VAC is lower than the value stored in VIN_ON (Register 0x35).
The system is in soft start sequence; fast loop filter is in use.
INRUSH control relay is off.
Can set AC_OK flag
INRUSH pin (can also
set AC_OK flag)
EEPROM_UNLOCKED
EEPROM_CRC
I2C_ADDRESS
0xFE81[6]
0xFE81[5]
0xFE81[4]
EEPROM is unlocked and its contents can be written.
The downloaded contents of the EEPROM are incorrect.
The resistor on the ADD pin has a value that can cause an error in the address
assignment (the address falls too close to the threshold between two
addresses).
LOW_LINE
FAST_OCP
SYNC_LOCK
AC_OK
0xFE81[3]
0xFE81[2]
0xFE81[1]
0xFE81[0]
The input voltage is higher than the high line threshold.
The threshold set for the comparator on the ILIM pin has been crossed.
External synchronization frequency is locked.
The output of the AC_OK pin is low. (This flag is a programmable combination
Programmable
Programmable
AC_OK pin
of other internal flags and refers to the condition of the input voltage.)
LOW_POWER
0xFE82[5]
The input power has dropped below the threshold for low power mode
Programmable
operation.
FAST_LOOP
0xFE82[4]
The fast loop compensation filter is in use.
Can set
POWER_GOOD# flag
VCORE_OV
VDD_3.3V_OV
VDD_3.3V_UV
0xFE82[3]
0xFE82[2]
0xFE82[1]
An overvoltage condition is present on the VCORE rail.
An overvoltage condition is present on the VDD rail.
An undervoltage condition is present on the VDD rail.
Programmable
Programmable
Shutdown
Rev. 0 | Page 25 of 84
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