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| 型号： | ADP1048ARQZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/84页 |
| 文件大小： | 0K |
| 描述： | IC DGTL PFC CTRLR 24QSOP |
| 标准包装： | 1 |
| 模式： | 平均电流 |
| 频率 - 开关： | 30kHz ~ 400kHz |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 标准包装 |
| 其它名称： | ADP1048ARQZ-R7DKR |
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Data Sheet
DATA TRANSMISSION FAULTS
Data transmission faults occur when two communicating devices
violate the PMBus communication protocol, as specified in the
PMBus specification. See the PMBus specification for more
information about each fault condition.
Corrupted Data, PEC (Item 10.8.1)
Parity error checking. Not supported.
Sending Too Few Bits (Item 10.8.2)
Transmission is interrupted by a start or stop condition before
a complete byte (eight bits) has been sent. Not supported; any
transmitted data is ignored.
ADP1047/ADP1048
DATA CONTENT FAULTS
Data content faults occur when data transmission is successful,
but the PMBus slave device cannot process the data that is
received from the master device.
Improperly Set Read Bit in the Address Byte (Item 10.9.1)
All PMBus commands start with a slave address with the R/W
bit cleared (set to 0), followed by the command code. If a host
starts a PMBus transaction with R/W set in the address phase
(equivalent to an I 2 C read), the PMBus slave considers this a
data content fault and responds as follows:
? ACKs the address byte
Reading Too Few Bits (Item 10.8.3)
Transmission is interrupted by a start or stop condition before
a complete byte (eight bits) has been read. Not supported; any
received data is ignored.
?
?
?
NACKs the command and data bytes
Sends all 1s (0xFF) as long as the host continues to
request data
Sets the CML bit in the STATUS_BYTE register
Host Sends or Reads Too Few Bytes (Item 10.8.4)
If a host ends a packet with a stop condition before the required
bytes are sent/received, it is assumed that the host intended to
stop the transfer. Therefore, the PMBus does not consider this
Invalid or Unsupported Command Code (Item 10.9.2)
If an invalid or unsupported command code is sent to the
PMBus slave, the code is considered to be a data content fault,
and the PMBus slave responds as follows:
to be an error and takes no action, except to flush any remain-
ing bytes in the transmit FIFO.
Host Sends Too Many Bytes (Item 10.8.5)
If a host sends more bytes than are expected for the corres-
?
?
?
NACKs the illegal/unsupported command byte and data
bytes
Flushes and ignores the received command and data
Sets the CML bit in the STATUS_BYTE register
ponding command, the PMBus slave considers this a data
transmission fault and responds as follows:
? NACKs all unexpected bytes as they are received
Reserved Bits (Item 10.9.5)
Accesses to reserved bits are not a fault. Writes to reserved bits
are ignored, and reads from reserved bits return 0.
?
?
Flushes and ignores the received command and data
Sets the CML bit in the STATUS_BYTE register
Write to Read-Only Commands
If a host performs a write to a read-only command, the PMBus
Host Reads Too Many Bytes (Item 10.8.6)
slave considers this a data content fault and responds as follows:
If a host reads more bytes than are expected for the corres-
ponding command, the PMBus slave considers this a data
transmission fault and responds as follows:
?
?
?
NACKs all unexpected data bytes as they are received
Flushes and ignores the received command and data
Sets the CML bit in the STATUS_BYTE register
?
?
Sends all 1s (0xFF) as long as the host continues to
request data
Sets the CML bit in the STATUS_BYTE register
Read from Write-Only Commands
Device Busy (Item 10.8.7)
The PMBus slave device is too busy to respond to a request
from the master device. Not supported.
If a host performs a read from a write-only command, the
PMBus slave considers this a data content fault and responds
as follows:
?
?
Sends all 1s (0xFF) as long as the host continues to
request data
Sets the CML bit in the STATUS_BYTE register
Rev. 0 | Page 37 of 84
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