参数资料
型号: ADP1048ARQZ-R7
厂商: Analog Devices Inc
文件页数: 27/84页
文件大小: 0K
描述: IC DGTL PFC CTRLR 24QSOP
标准包装: 1
模式: 平均电流
频率 - 开关: 30kHz ~ 400kHz
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 标准包装
其它名称: ADP1048ARQZ-R7DKR
Data Sheet
ADP1047/ADP1048
Name
Address
Description
Action
STATUS_VOUT (0x7A)
VOUT_OV_FAULT
VOUT_OV_WARN
VOUT_UV_WARN
VOUT_UV_FAULT
0x7A[7]
0x7A[6]
0x7A[5]
0x7A[4]
The output voltage is above the VOUT_OV_FAULT_LIMIT.
The output voltage is above the VOUT_OV_WARN_LIMIT.
The output voltage is below the VOUT_UV_WARN_LIMIT.
The output voltage is below the VOUT_UV_FAULT_LIMIT.
Programmable
Programmable
STATUS_INPUT (0x7C)
VIN_OV_FAULT
VIN_UV_WARN
VIN_UV_FAULT
VIN_LOW
0x7C[7]
0x7C[5]
0x7C[4]
0x7C[3]
The input voltage on VAC is larger than the value in VIN_OV_FAULT_LIMIT.
The input voltage on VAC is smaller than the value in VIN_UV_WARN_LIMIT.
The input voltage on VAC is smaller than the value in VIN_UV_FAULT_LIMIT.
VAC is lower than VIN_OFF. This signal shuts down the power supply.
Programmable
Programmable
Can set AC_OK
flag
IIN_OC_FAULT
0x7C[2]
The input current measured on the CS ADC is larger than the value in
Programmable
IIN_OC_FAULT_LIMIT.
IIN_OC_WARN
PIN_OP_WARN
0x7C[1]
0x7C[0]
The input current measured on the CS ADC is larger than the value in
IIN_OC_WARN_LIMIT.
Input overpower warning.
Can set AC_OK
flag
STATUS_TEMPERATURE
(0x7D)
OT_FAULT
OT_WARN
0x7D[7]
0x7D[6]
The measured temperature is above the value set in OT_FAULT_LIMIT.
The measured temperature is above the value set in OT_WARN_LIMIT.
Programmable
PMBus FAULT FLAG RESPONSE
All standard PMBus fault response registers follow the same
format. The six standard PMBus fault response registers are
Concurrent Faults
When multiple faults occur at the same time, the state machine
executes the response that has the highest priority. Flag priority
?
?
?
?
?
?
VOUT_OV_FAULT_RESPONSE (Register 0x41)
VOUT_UV_FAULT_RESPONSE (Register 0x45)
OT_FAULT_RESPONSE (Register 0x50)
VIN_OV_FAULT_RESPONSE (Register 0x56)
VIN_UV_FAULT_RESPONSE (Register 0x5A)
IIN_OC_FAULT_RESPONSE (Register 0x5C)
is determined by the response of the faults as determined by
Bits[7:6]. The higher the number in these two bits, the higher
the priority.
For example, if OVP is programmed to disable the output
(Bits[7:6] = 11) and OCP is programmed to shut down and
retry after a delay (Bits[7:6] = 01), and both faults occur at the
same time, the OVP action is executed first. If the OVP con-
The standard PMBus fault response registers are composed of
eight bits: Bits[7:6] define the response type, Bits[5:3] define the
retry settings, and Bits[2:0] contain the delay information.
Bits[7:6] define the response type as follows:
dition is cleared and the OCP flag is still set, the programmed
action for OCP is executed.
If two or more faults occur at the same time and all the faults
have the same response priority, the fault with the smallest retry
?
?
?
Bits[7:6] = 00 (ignore). When the corresponding fault flag
is set, no action is taken and the power supply continues to
operate normally.
Bits[7:6] = 01 or 10 (shutdown and retry). When the cor-
responding fault flag is set, the system shuts down and then
retries for the number of times programmed in Bits[5:3].
The difference between the 01 and 10 options is that when
Bits[7:6] = 01, a debounce (programmed in Bits[2:0]) is
applied to the flag.
Bits[7:6] = 11 (disable output). When the corresponding
setting takes priority. For example, if one fault has a retry setting
programmed to 011 and the other has a retry setting of 001, the
lower number of retries is executed.
fault flag is set, the system does not enter a shutdown/soft
start sequence. Instead, the output is disabled indefinitely
until the flag is cleared. Care must be taken when selecting
this option because it may cause the system to stall in an
endless loop.
Rev. 0 | Page 27 of 84
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