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| 型号： | ADP1048ARQZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 34/84页 |
| 文件大小： | 0K |
| 描述： | IC DGTL PFC CTRLR 24QSOP |
| 标准包装： | 1 |
| 模式： | 平均电流 |
| 频率 - 开关： | 30kHz ~ 400kHz |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 标准包装 |
| 其它名称： | ADP1048ARQZ-R7DKR |
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ADP1047/ADP1048
PMBus DIGITAL COMMUNICATION
The PMBus slave allows a device to interface to a PMBus-
compliant master device as specified by the PMBus Power
System Management Protocol Specification (Revision 1.1,
February 5, 2007). The PMBus slave is a 2-wire interface that
can be used to communicate with other PMBus-compliant
devices and is compatible in a multimaster, multislave bus
configuration.
FEATURES
The function of the PMBus slave is to decode the command sent
from the master device and respond as requested. Communi-
cation is established using an I 2 C-like 2-wire interface with
a clock line (SCL) and data line (SDA). The PMBus slave is
designed to externally move chunks of 8-bit data (bytes) while
maintaining compliance with the PMBus protocol. The PMBus
protocol is based on the SMBus Specification (Version 2.0,
August 2000). The SMBus specification is, in turn, based on
the Philips I 2 C Bus Specification (Version 2.1, January 2000).
The PMBus incorporates the following features:
? Slave operation on multiple device systems
? 7-bit addressing
Data Sheet
When communicating with the master device, it is possible
for illegal or corrupted data to be received by the PMBus slave
device. In this case, the PMBus slave device should respond to
the invalid command or data, as defined by the PMBus specifi-
cation, and indicate to the master device that an error or fault
condition has occurred. This method of handshaking can be
used as a first level of defense against programming of the slave
device that can potentially damage the chip or system.
The PMBus specification defines a set of generic PMBus
commands that is recommended for a power management
system. However, each PMBus device manufacturer can choose
to implement and support certain commands as it deems fit for
its system. In addition, the PMBus device manufacturer can
choose to implement manufacturer-specific commands whose
functions are not included in the generic PMBus command set.
The list of standard PMBus and manufacturer-specific commands
PMBus ADDRESS
?
?
?
?
?
100 kHz and 400 kHz data rates
General call address support
Support for clock low extension
Separate multiple byte receive and transmit FIFO
Extensive fault monitoring
Control of the ADP1047 / ADP1048 is implemented via the I 2 C
interface. The ADP1047 / ADP1048 are connected to the bus as
slave devices under the control of a master device.
The PMBus address of the ADP1047 / ADP1048 is set by
connecting an external resistor from the ADD pin to ground.
OVERVIEW
The PMBus slave module is a 2-wire interface that can be used
to communicate with other PMBus-compliant devices. Its trans-
fer protocol is based on the Philips I 2 C transfer mechanism. The
PMBus addresses. Eight different addresses can be used.
Table 14. PMBus Address Settings
Address ADD Pin Resistor Value (kΩ)
overall system. The ADP1047 / ADP1048 communicate with the
master device using one data pin (SDA) and one clock pin (SCL).
Because the ADP1047 / ADP1048 are slave devices, they cannot
generate the clock signal. However, they are capable of clock-
stretching the SCL line to put the master device in a wait state
when they are not ready to respond to the master’s request.
Communication is initiated when the master device sends a
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
10 (or connect directly to AGND)
30
50
69
89
109
128
148 (or connect directly to VDD)
command to the PMBus slave device. Commands can be read
or write commands, in which case, data is transferred between
the devices in a byte wide format. Commands can also be send
commands, in which case, the command is executed by the
slave device upon receiving the stop bit. The stop bit is the last
bit in a complete data transfer, as defined in the PMBus/I 2 C
communication protocol. During communication, the master
and slave devices send acknowledge (A) or no acknowledge
If an incorrect resistor value is used and the resulting I 2 C address is
close to a threshold between two addresses, the I2C_ADDRESS
flag is set (Bit 4 of Register 0xFE81). The recommended resistor
values in Table 14 can vary by ±2 kΩ. Therefore, it is recom-
mended that 1% tolerance resistors be used on the ADD pin.
The part responds to the standard PMBus broadcast address
(general call) of 0x00.
(A) bits as a method of handshaking between devices. See the
PMBus specification for a more detailed description of the
communication protocol.
Rev. 0 | Page 34 of 84
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