参数资料
型号: ADP1048ARQZ-R7
厂商: Analog Devices Inc
文件页数: 74/84页
文件大小: 0K
描述: IC DGTL PFC CTRLR 24QSOP
标准包装: 1
模式: 平均电流
频率 - 开关: 30kHz ~ 400kHz
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 标准包装
其它名称: ADP1048ARQZ-R7DKR
ADP1047/ADP1048
CS FAST OCP BLANK REGISTER
Table 122. Register 0xFE3D—CS Fast OCP Blank
Data Sheet
Bits
[7:5]
[4:3]
Bit Name
RSVD
CS OCP debounce
time
R/W
R
R/W
Description
Reserved.
These bits set the CS OCP debounce time. This value is the minimum time that the CS signal must
be constantly above the ILIM threshold (set in Register 0xFE3E, Bits[7:5]). When the CS OCP debounce
time is exceeded, all PWM outputs are disabled for the remainder of the switching cycle.
Bit 4
0
0
1
1
Bit 3
0
1
0
1
Fast OCP Debounce Time
40 ns
80 ns
120 ns
240 ns
[2:0]
Leading edge
blanking time
R/W
These bits determine the leading edge blanking time. During this time, the OCP comparator
output is ignored.
Bit 2
0
0
0
0
1
1
1
1
Bit 1
0
0
1
1
0
0
1
1
Bit 0
0
1
0
1
0
1
0
1
Leading Edge Blanking Time
40 ns
80 ns
120 ns
160 ns
200 ns
400 ns
600 ns
800 ns
CS FAST OCP SETTING REGISTER
Table 123. Register 0xFE3E—CS Fast OCP Setting
Bits
[7:5]
Bit Name
ILIM absolute value
R/W
R/W
Description
These bits determine the ILIM absolute value. Bit 7 = 0 is positive sensing, and Bit 7 = 1 is
negative sensing.
Bit 7
0
0
0
0
1
1
1
1
Bit 6
0
0
1
1
0
0
1
1
Bit 5
0
1
0
1
0
1
0
1
ILIM Current Value
20 μA
40 μA
60 μA
80 μA
60 μA
80 μA
100 μA
120 μA
[4:2]
1
RSVD
CS_RANGE_SELECT
R
R/W
Reserved.
CS ADC input range.
0 = 750 mV.
1 = 500 mV.
0
SEL_RESVI_REF
R/W
This bit sets the reference current for the CS+ and CS? common-mode level shift.
1 = select the RES VI reference current (changing R RES changes this current).
0 = select the band gap generated reference current.
TEMPERATURE HYSTERESIS REGISTER
Table 124. Register 0xFE3F—Temperature Hysteresis
Bits
[7:0]
Bit Name
Temperature
hysteresis
R/W
R/W
Description
These bits set the temperature (RTD) measurement hysteresis. The OT_FAULT flag is reset when
the RTD ADC value is higher than the temperature fault limit plus hysteresis. The OT_WARN flag
is reset when the RTD ADC value is higher than the temperature warning limit plus hysteresis.
Rev. 0 | Page 74 of 84
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