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参数资料
型号： ATMEGA103-6AI
厂商： Atmel
文件页数： 62/141页
文件大小： 0K
描述： IC MCU 128K 6MHZ A/D IT 64TQFP
产品培训模块： megaAVR Introduction
标准包装： 90
系列： AVR® ATmega
核心处理器： AVR
芯体尺寸： 8-位
速度： 6MHz
连通性： SPI，UART/USART
外围设备： POR，PWM，WDT
输入/输出数： 32
程序存储器容量： 128KB（64K x 16）
程序存储器类型： 闪存
EEPROM 大小： 4K x 8
RAM 容量： 4K x 8
电压 - 电源 (Vcc/Vdd)： 4 V ~ 5.5 V
数据转换器： A/D 8x10b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 64-TQFP
包装： 托盘
配用： ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
27
ATmega103(L)
0945I–AVR–02/07
Note:
1. The Power-on Reset will not work unless the supply voltage has been below V
POT
(falling).
Power-on Reset
A Power-on Reset (POR) circuit ensures that the device is Reset from Power-on. As
shown in Figure 23, an internal timer clocked from the Watchdog Timer Oscillator pre-
vents the MCU from starting until after a certain period after V
CC has reached the Power-
on Threshold voltage (V
POT), regardless of the VCC rise time (see Figure 24). The Fuse
bits SUT1 and SUT0 are used to select start-up time as indicated in Table 5. A “0” in the
table indicates that the fuse is programmed.
The user can select the start-up time according to typical Oscillator start-up time. The
number of WDT Oscillator cycles used for each Time-out except for SUT = 00 is shown
in Table 6. The frequency of the Watchdog Oscillator is voltage-dependent as shown in
“Typical Characteristics” on page 123.
The setting SUT 1/0 = 00 starts the MCU after 5 CPU clock cycles, and can be used
when an external clock signal is applied to the XTAL1 pin. This setting does not use the
WDT Oscillator and enables very fast start-up from the sleep modes Power-down or
Power-save if the clock signal is present during sleep. For details, refer to the program-
ming specification starting on page 104.
If the built-in start-up delay is sufficient, RESET can be connected to V
CC directly or via
an external pull-up resistor. By holding the pin low for a period after V
CC has been
applied, the Power-on Reset period can be extended. Refer to Figure 25 for a timing
example of this.
Table 5. Reset Characteristics (V
CC = 5.0V)
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
POT
(1)
Power-on Reset Threshold
(rising)
1.0
1.4
1.8
V
Power-on Reset Threshold
(falling)
0.4
0.6
0.8
V
VRST
RESET Pin Threshold Voltage
VCC/2
V
T
TOUT
Reset Delay Time-out Period
SUT = 00
5
CPU cycles
SUT = 01
SUT = 10
SUT = 11
0.4
3.2
12.8
0.5
4.0
16.0
0.6
4.8
19.2
ms
Table 6. Number of Watchdog Oscillator Cycles
SUT 1/0
Time-out at VCC = 5V
Number of WDT Cycles
01
0.5 ms
512
10
4.0 ms
4K
11
16.0 ms
16K
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