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参数资料
| 型号： | CLRC63201T |
| 厂商： | NXP Semiconductors N.V. |
| 元件分类： | 通信及网络 |
| 英文描述： | Multiple protocol contactless reader IC (MIFARE-I-CODE1) |
| 封装： | CLRC63201T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,; |
| 文件页数： | 48/126页 |
| 文件大小： | 719K |
| 代理商： | CLRC63201T |
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CLRC632_35
NXP B.V. 2009. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 10 November 2009
073935
28 of 126
NXP Semiconductors
CLRC632
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
9.6 Power reduction modes
9.6.1 Hard power-down
Hard power-down is enabled when pin RSTPD is HIGH. This turns off all internal current
sinks including the oscillator. All digital input buffers are separated from the input pads and
dened internally (except pin RSTPD itself). The output pins are frozen at a given value.
The status of all pins during a hard power-down is shown in Table 25.
9.6.2 Soft power-down mode
Soft power-down mode is entered immediately using the Control register bit PowerDown.
All internal current sinks, including the oscillator buffer, are switched off. The digital input
buffers are not separated from the input pads and keep their functionality. In addition, the
digital output pins do not change their state.
After resetting the Control register bit PowerDown, the bit indicating Soft power-down
mode is only cleared after 512 clock cycles. Resetting it does not immediately clear it. The
PowerDown bit is automatically cleared when the Soft power-down mode is exited.
Remark: When the internal oscillator is used, time (tosc) is required for the oscillator to
become stable. This is because the internal oscillator is supplied by VDDA and any clock
cycles will not be detected by the internal logic until VDDA is stable.
Table 25.
Signal on pins during Hard power-down
Symbol
Pin
Type
Description
OSCIN
1
I
not separated from input, pulled to AVSS
IRQ
2
O
high-impedance
MFIN
3
I
separated from input
MFOUT
4
O
LOW
TX1
5
O
HIGH, if bit TX1RFEn = logic 1
LOW, if bit TX1RFEn = logic 0
TX2
7
O
HIGH, only if bit TX2RFEn = logic 1 and bit
TX2Inv = logic 0
otherwise LOW
NCS
9
I
separated from input
NWR
10
I
separated from input
NRD
11
I
separated from input
D0 to D7
13 to 20
I/O
separated from input
ALE
21
I
separated from input
A0
22
I/O
separated from input
A1
23
I
separated from input
A2
24
I
separated from input
AUX
27
O
high-impedance
RX
29
I
not changed
VMID
30
A
pulled to VDDA
RSTPD
31
I
not changed
OSCOUT
32
O
HIGH
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相关代理商/技术参数 |
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|---|---|
| CLRC63201T/0FE | 制造商:NXP Semiconductors 功能描述: |
| CLRC63201T/0FE,112 | 功能描述:RFID应答器 I.CODE HS READER RoHS:否 制造商:Murata 存储容量:512 bit 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| CLRC63201T/0FE,118 | 制造商:NXP Semiconductors 功能描述:Interface Misc |
| CLRC63201T/0FE112 | 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 5V ISO14443 + ISO15693 |
| CLRC663 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Contactless reader IC |
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