
CLRC632_35
NXP B.V. 2009. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 10 November 2009
073935
46 of 126
NXP Semiconductors
CLRC632
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
10.4 CLRC632 register ags overview
Page 4: RF Timing and channel redundancy
20h
Page
selects the page register
21h
RxWait
selects the interval after transmission before the receiver starts
22h
ChannelRedundancy
selects the method and mode used to check data integrity on
the RF channel
23h
CRCPresetLSB
preset LSB value for the CRC register
24h
CRCPresetMSB
preset MSB value for the CRC register
25h
TimeSlotPeriod
selects the time between automatically transmitted frames
26h
MFOUTSelect
selects internal signal applied to pin MFOUT, includes the MSB
27h
PreSet27
these values are not changed
Page 5: FIFO, timer and IRQ pin conguration
28h
Page
selects the page register
29h
FIFOLevel
denes the FIFO buffer overow and underow warning levels
2Ah
TimerClock
selects the timer clock divider
2Bh
TimerControl
selects the timer start and stop conditions
2Ch
TimerReload
denes the timer preset value
2Dh
IRQPinCong
congures pin IRQ output stage
2Eh
PreSet2E
these values are not changed
2Fh
PreSet2F
these values are not changed
Page 6: reserved registers
30h
Page
selects the page register
31h
reserved
32h
reserved
33h
reserved
34h
reserved
35h
reserved
36h
reserved
37h
reserved
Page 7: Test control
38h
Page
selects the page register
39h
reserved
3Ah
TestAnaSelect
selects analog test mode
3Bh
reserved
3Ch
reserved
3Dh
TestDigiSelect
selects digital test mode
3Eh
reserved
3Fh
reserved
Table 39.
CLRC632 register overview …continued
Sub
address
(Hex)
Register name
Function
Refer to