参数资料
型号: CLRC63201T
厂商: NXP Semiconductors N.V.
元件分类: 通信及网络
英文描述: Multiple protocol contactless reader IC (MIFARE-I-CODE1)
封装: CLRC63201T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;
文件页数: 6/126页
文件大小: 719K
代理商: CLRC63201T
CLRC632_35
NXP B.V. 2009. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 10 November 2009
073935
103 of 126
NXP Semiconductors
CLRC632
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
Remark: The signal ALE is not relevant for separate address/data bus and the
multiplexed addresses on the data bus do not care. The multiplexed address and data bus
address lines (A0 to A2) must be connected as described in Section 9.1.3 on page 8.
13.4.2 Common read/write strobe bus timing
Fig 23. Separate read/write strobe timing diagram
001aaj638
tSLRWL
tRWHSH
tRWHRWL
tWHDX
tRHDZ
tWLQV
tRLDV
tAVRWL
tWHAX
tLLAX
tAVLL
tRWLRWH
tLLRWL
tRWHRWL
tLHLL
A0 to A2
D0 to D7
NWR
NRD
NCS
ALE
A0 to A2
Multiplexed address bus
Separated address bus
Table 169. Common read/write strobe timing specication
Symbol
Parameter
Conditions
Min
Typ
Max Unit
tLHLL
ALE HIGH time
20
-
ns
tAVLL
address valid to ALE LOW time
15
-
ns
tLLAX
address hold after ALE LOW time
8
-
ns
tLLDSL
ALE LOW to data strobe LOW time
NWR or NRD
LOW
15
--ns
tSLDSL
chip select LOW to data strobe
LOW time
NCS LOW to
NDS LOW
0
--ns
tDSHSH
data strobe HIGH to chip select
HIGH time
0
--ns
tDSLDV
data strobe LOW to data input valid
time
-
65
ns
tDSHDZ
data strobe HIGH to data input high
impedance time
-
20
ns
tDSLQV
data strobe LOW to data output
valid time
NDS/NCS LOW
-
35
ns
tDSHQX
data output hold after data strobe
HIGH time
NDS HIGH (write
cycle hold time)
8
--ns
tDSHRWX
RW hold after data strobe HIGH
time
after NDS HIGH
8
-
ns
tDSLDSH
data strobe LOW time
NDS/NCS
65
-
ns
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