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参数资料
型号： DS32512N#
厂商： Maxim Integrated Products
文件页数： 114/130页
文件大小： 0K
描述： IC LIU DS3/E3/STS-1 484-BGA
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 60
类型： 线路接口装置（LIU）
规程： DS3
电源电压： 3.135 V ~ 3.465 V
安装类型： 表面贴装
封装/外壳： 484-BGA
供应商设备封装： 484-BGA（23x23）
包装： 管件
DS32506/DS32508/DS32512
84 of 130
9.8 BERT Registers
ADDRESS
OFFSET
REGISTER
REGISTER DESCRIPTION
50h
BERT.CR
BERT Control Register
52h
BERT.PCR
BERT Pattern Configuration Register
54h
BERT.SPR1
BERT Seed/Pattern Register 1
56h
BERT.SPR2
BERT Seed/Pattern Register 2
58h
BERT.TEICR
Transmit Error Insertion Control Register
5Ah
—
Unused
5Ch
BERT.SR
BERT Status Register
5Eh
BERT.SRL
BERT Status Register Latched
60h
BERT.SRIE
BERT Status Register Interrupt Enable
62h
—
Unused
64h
BERT.RBECR1
Receive Bit Error Count Register 1
66h
BERT.RBECR2
Receive Bit Error Count Register 2
68h
BERT.RBCR1
Receive Bit Count Register 1
6Ah
BERT.RBCR2
Receive Bit Count Register 2
6Ch
—
Unused
6Eh
—
Unused
Register Name:
BERT.CR
Register Description:
BERT Control Register
Register Address:
n * 80h + 50h
Bit #
15
14
13
12
11
10
9
8
Name
—
Default
0
Bit #
7
6
5
4
3
2
1
0
Name
PMUM
LPMU
RNPL
RPIC
MPR
APRD
TNPL
TPIC
Default
0
Bit 7: Performance Monitoring Update Mode (PMUM).
This bit specifies the source of the performance
monitoring update signal for the BERT block. See Section 8.7.4. Note: If RPMU or LPMU is one, changing the state
of this bit may cause a performance monitoring update to occur.
0 = Block-level update via BERT.CR:LPMU
1 = Port-level or global update as specified by PORT.CR1:PMUM
Bit 6: Local Performance Monitoring Update (LPMU).
When BERT.CR:PMUM = 0, this bit updates the
performance monitoring registers in the BERT block. When this bit transitions from low to high, the BERT.RBECR
and BERT.RBCR registers are updated with the latest counter values and the counters are reset. This bit should
remain high until the performance monitor update status bit (BERT.SR:PMS) goes high, and then it should be
brought back low, which clears the PMS status bit. If a counter increment occurs at the exact same time as the
counter reset, the counter is loaded with a value of one, and the “counter is non-zero” latched status bit is set. See
Section 8.7.4.
Bit 5: Receive New Pattern Load (RNPL).
A zero-to-one transition of this bit causes the programmed test pattern
(QRSS, PTS, PLF[4:0], PTF[4:0] in the BERT.PCR register, and BSP[31:0] in the BERT.SPR registers) to be
loaded into the receive pattern generator. This bit must be changed to zero and back to one for another pattern to
be loaded. Loading a new pattern forces the receive pattern generator out of the “Sync” state which causes a
resynchronization to be initiated. Note: The test pattern fields mentioned above must not change for four RCLK
cycles after this bit transitions from zero to one. See Section 8.5.1.
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相关代理商/技术参数
参数描述
DS32512N# 功能描述:网络控制器与处理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS32512N+ 功能描述:网络控制器与处理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS32512NA2 制造商:Maxim Integrated Products 功能描述:DS32512 X12 DS3/E3 LIU REVA2 IND - Rail/Tube
DS32512NW 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS32512W 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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