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| 型号： | DSPB56367AG150 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 68/100页 |
| 文件大小： | 0K |
| 描述： | IC DSP 24BIT 150MHZ 144-LQFP |
| 标准包装： | 60 |
| 系列： | DSP56K/Symphony |
| 类型： | 音频处理器 |
| 接口： | 主机接口，I²C，SAI，SPI |
| 时钟速率： | 150MHz |
| 非易失内存： | ROM（240 kB） |
| 芯片上RAM： | 69kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 1.80V |
| 工作温度： | -40°C ~ 95°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
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Power
DSP56367 Technical Data, Rev. 2.1
Freescale Semiconductor
2-3
2.2
Power
2.3
Ground
Table 2-2 Power Inputs
Power Name
Description
VCCP
PLL Power—VCCP is VCC dedicated for PLL use. The voltage should be well-regulated and the input should
be provided with an extremely low impedance path to the VCC power rail. There is one VCCP input.
VCCQL (4)
Quiet Core (Low) Power—VCCQL is an isolated power for the internal processing logic. This input must be
tied externally to all other VCCQL power pins and the VCCP power pin only. Do not tie with other power pins.
The user must provide adequate external decoupling capacitors. There are four VCCQL inputs.
VCCQH (3)
Quiet External (High) Power—VCCQH is a quiet power source for I/O lines. This input must be tied externally
to all other chip power inputs.The user must provide adequate decoupling capacitors. There are three VCCQH
inputs.
VCCA (3)
Address Bus Power—VCCA is an isolated power for sections of the address bus I/O drivers. This input must
be tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are three VCCA inputs.
VCCD (4)
Data Bus Power—VCCD is an isolated power for sections of the data bus I/O drivers. This input must be tied
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There are four VCCD inputs.
VCCC (2)
Bus Control Power—VCCC is an isolated power for the bus control I/O drivers. This input must be tied
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There are two VCCC inputs.
VCCH
Host Power—VCCH is an isolated power for the HDI08 I/O drivers. This input must be tied externally to all
other chip power inputs. The user must provide adequate external decoupling capacitors. There is one VCCH
input.
VCCS (2)
SHI, ESAI, ESAI_1, DAX and Timer Power —VCCS is an isolated power for the SHI, ESAI, ESAI_1, DAX
and Timer. This input must be tied externally to all other chip power inputs. The user must provide adequate
external decoupling capacitors. There are two VCCS inputs.
Table 2-3 Grounds
Ground Name
Description
GNDP
PLL Ground—GNDP is a ground dedicated for PLL use. The connection should be provided with an
extremely low-impedance path to ground. VCCP should be bypassed to GNDP by a 0.47 F capacitor located
as close as possible to the chip package. There is one GNDP connection.
GNDQ (4)
Quiet Ground—GNDQ is an isolated ground for the internal processing logic. This connection must be tied
externally to all other chip ground connections. The user must provide adequate external decoupling
capacitors. There are four GNDQ connections.
GNDA (4)
Address Bus Ground—GNDA is an isolated ground for sections of the address bus I/O drivers. This
connection must be tied externally to all other chip ground connections. The user must provide adequate
external decoupling capacitors. There are four GNDA connections.
GNDD (4)
Data Bus Ground—GNDD is an isolated ground for sections of the data bus I/O drivers. This connection
must be tied externally to all other chip ground connections. The user must provide adequate external
decoupling capacitors. There are four GNDD connections.
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