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| 型号： | EVAL-ADUC7039QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/92页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADUC7039 |
| 设计资源： | ADuC7039QSPZ Gerber Files EVAL-ADuC7039 Schematic & Brd Outline |
| 标准包装： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC7039 |
| 所含物品： | 板 |
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Data Sheet
ADuC7039
Rev. D | Page 21 of 92
FLASH/EE MEMORY SIGNATURE
The entire 62 kB or the part of Flash/EE memory available to
the user can be signed using the FEESIG register and signature
command.
This feature automatically reads the code in that section of the
memory specified by the FEEADR and FEEDAT MMRS:
FEEADR contains an address situated in the first half page
of the section to be signed.
FEEDAT contains an address situated in the first half page
above the last page of the section to be signed. See Figure 7
in this example, Page 0 and Page 1 are signed.
Figure 7. Signature Command Indexing
If the 8 MSB of FEEADR and FEEDAT are identical, that
is, the MMRS point to the same page, nothing is signed.
The last two 16-bit locations are not included in the
signature; they are reserved for the user-programmed
signature.
It is possible to sign half pages, by specifying a half page
address in FEEADR and FEEDAT. For example, to sign
the second half of Page 0 and the first half of Page 1,
FEEADR = 0x0100 and FEEDAT = 0x0300.
This feature is also used by the on-chip kernel at power-up to
check the validity of Page 0 before jumping to user code. Store
the signature of Page 0 at Address 0x801FC when programming
the device. See the ADuC7039 Kernel section for more details.
Flash/EE Memory Signature Registers
Name:
FEESIG
Address:
0xFFFF0E18
Default Value:
Updated by kernel
Access:
Read only
Function:
This MMR contains a 24-bit signature of the
Flash/EE memory.
Example of User Code Signature
Int a = FEESTA;
// Ensure FEESTA is cleared
FEEADR = 0x0000;
// Start page address
FEEDAT = 0x0600;
// Stop (page + 1) address
FEECON = 0x0B;
// Signs Page 0 to Page 2 excluding
// Address 0x805FC
while (FEESTA & 0x04){}
// Wait for command to finish
User code can compare the content of FEESIG with the content of Address 0x805FC.
Polynomial
A software routine is provided by Analog Devices, Inc., to calculate the unique 24-bit signature.
0x80000
PAGE 0
0x80200
PAGE 1
0x80400
FEEDAT = 0x04XX
FEEADR = 0x00XX
08463-
008
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| EVAL-ADUC7060QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVALADUC7060QSPZU2 | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits) |
| EVAL-ADUC7061MKZ | 功能描述:开发板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 产品:Development Boards 工具用于评估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口类型:DAC, ICSP, JTAG, UART, USB 工作电源电压:3.3 V |
| EVAL-ADUC7061MKZ | 制造商:Analog Devices 功能描述:ADUC7061MKZ EvaluationBoard |
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