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| 型号： | EVAL-ADUC7039QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/92页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADUC7039 |
| 设计资源： | ADuC7039QSPZ Gerber Files EVAL-ADuC7039 Schematic & Brd Outline |
| 标准包装： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC7039 |
| 所含物品： | 板 |
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Data Sheet
ADuC7039
Rev. D | Page 15 of 92
MEMORY ORGANIZATION
The ARM7, a von Neumann architecture, MCU core sees mem-
the ADuC7039 maps this into four distinct user areas, namely: a
memory area that can be remapped, an SRAM area, a Flash/EE
area, and a memory mapped register (MMR) area.
Figure 5. ADuC7039 Memory Map, 64 kB Flash Option
The first 64 kB of this memory space is used as an area into
which the on-chip Flash/EE or SRAM can be remapped.
The ADuC7039 features a second 4 kB area at the top of
the memory map used to locate the MMRs, through which
all on-chip peripherals are configured and monitored.
The ADuC7039 features an SRAM size of 4 kB.
The ADuC7039 features 64 kB of on-chip Flash/EE
memory. However, 62 kB of on-chip Flash/EE memory are
available to the user. In addition, 2 kB are reserved for the
on-chip kernel.
Any access, either reading or writing, to an area not defined in
the memory map results in a data abort exception.
Memory Format
The ADuC7039 memory organization is configured in little
endian format: the least significant byte is located in the lowest
byte address, and the most significant byte in the highest byte
address.
Figure 6. Little Endian Format
SRAM
The ADuC7039 features 4 kB of SRAM, organized as 1024 × 32
bits, that is, 1024 words, which is located at 0x40000.
The RAM space can be used as data memory and also as a
volatile program space.
ARM code can run directly from SRAM at full clock speed
given that the SRAM array is configured as a 32-bit wide
memory array. SRAM is read/writeable in 8-, 16-, and 32-bit
segments.
Remap
The ARM exception vectors are all situated at the bottom
of the memory array, from Address 0x00000000 to Address
0x00000020.
By default, after a reset, the Flash/EE memory is logically mapped
to Address 0x00000000. It is possible to logically remap the
SRAM to Address 0x00000000. This is accomplished by setting
Bit 0 of the SYSMAP MMR located at 0xFFFF0220. To revert
Flash/EE to 0x00000000, Bit 0 of SYSMAP is cleared.
It is sometimes desirable to remap RAM to 0x00000000 to
execute code from SRAM while erasing a page of Flash/EE
memory.
Remap Operation
When a reset occurs on the ADuC7039, execution starts auto-
matically in the factory programmed internal configuration
code. This so-called kernel is hidden and cannot be accessed
by user code. If the ADuC7039 is in normal mode, it executes
the power-on configuration routine of the kernel and then
jumps to the reset vector, Address 0x00000000, to execute the
user’s reset exception routine. Because the Flash/EE is mirrored
at the bottom of the memory array at reset, the reset routine
must always be written in Flash/EE.
0x0040FFF
0x00040000
0xFFFF0FFF
0xFFFF0000
MMRs
0x0008FFFF
0x00080000
FLASH/EE
SRAM
0x0000F7FF
0x00000000
REMAPPABLE MEMORY SPACE
(FLASH/EE OR SRAM)
RESERVED
08463-
005
BIT 31
BYTE 2
A
6
2
.
BYTE 3
B
7
3
.
BYTE 1
9
5
1
.
BYTE 0
8
4
0
.
BIT 0
32 BITS
0xFFFFFFFF
0x00000004
0x00000000
08463-
007
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| EVAL-ADUC7060QSPZ | 功能描述:KIT DEV QUICK START ADUC7060 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC7060QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVALADUC7060QSPZU2 | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits) |
| EVAL-ADUC7061MKZ | 功能描述:开发板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 产品:Development Boards 工具用于评估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口类型:DAC, ICSP, JTAG, UART, USB 工作电源电压:3.3 V |
| EVAL-ADUC7061MKZ | 制造商:Analog Devices 功能描述:ADUC7061MKZ EvaluationBoard |
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