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| 型号： | EVAL-ADUC7060QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 85/100页 |
| 文件大小： | 0K |
| 描述： | KIT DEV QUICK START ADUC7060 |
| 产品变化通告： | ADuC7060/1 Idd Specification Change 01/Feb/2010 |
| 设计资源： | ADUC7060 Gerber Files EVAL-ADuC7060 schematic |
| 标准包装： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC7060 |
| 所含物品： | 评估板、电源、缆线、软件、仿真器和说明文档 |
| 其它名称： | Q5189809 |
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ADuC7060
I 2 C Master Receive, I2CMRX, Register
I 2 C Master Current Read Count, I2CMCNT1, Register
Name:
Address:
Default value:
Access:
Function:
I2CMRX
0xFFFF0908
0x00
Read only
This 8-bit MMR is the I 2 C master receive
register.
Name:
Address:
Default value:
Access:
Function:
I2CMCNT1
0xFFFF0914
0x00
Read only
This 8-bit MMR holds the number of bytes
received so far during a read sequence with a
slave device.
I 2 C Master Transmit, I2CMTX, Register
Name: I2CMTX
I 2 C Address 0, I2CADR0, Register
Name:
I2CADR0
Address:
0xFFFF090C
Address:
0xFFFF0918
Default value:
0x00
Default value:
0x00
Access:
Write only
Access:
Read and write
Function:
This 8-bit MMR is the I 2 C master transmit
register.
I 2 C Master Read Count, I2CMCNT0, Register
Name:
I2CMCNT0
Function:
This 8-bit MMR holds the 7-bit slave address
and the read/write bit when the master begins
communicating with a slave.
Table 97. I2CADR0 MMR in 7-Bit Address Mode
Address:
Default value:
Access:
Function:
0xFFFF0910
0x0000
Read and write
This 16-bit MMR holds the required number
of bytes when the master begins a read
Bit
7:1
0
Name
I2CADR
R/W
Description
These bits contain the 7-bit address of the
required slave device.
Bit 0 is the read/write bit.
When this bit = 1, a read sequence is requested.
When this bit = 0, a write sequence is requested.
sequence from a slave device.
Table 98. I2CADR0 MMR in 10-Bit Address Mode
Bit
Name
Description
Table 96. I2CMCNT0 MMR Bit Descriptions
7:3
These bits must be set to [11110b] in 10-bit
Bit
Name
Description
address mode.
15:9
8
I2CRECNT
Reserved.
Set this bit if more than 256 bytes are
required from the slave.
2:1
0
I2CMADR
R/W
These bits contain ADDR[9:8] in 10-bit
addressing mode.
Read/write bit.
Clear this bit when reading 256 bytes or
fewer.
When this bit = 1, a read sequence is
requested.
7:0
I2CRCNT
These eight bits hold the number of bytes
required during a slave read sequence,
When this bit = 0, a write sequence is
requested.
minus 1. If only a single byte is required, set
these bits to 0.
Rev. 0 | Page 85 of 100
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相关代理商/技术参数 |
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|---|---|
| EVAL-ADUC7060QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVALADUC7060QSPZU2 | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits) |
| EVAL-ADUC7061MKZ | 功能描述:开发板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 产品:Development Boards 工具用于评估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口类型:DAC, ICSP, JTAG, UART, USB 工作电源电压:3.3 V |
| EVAL-ADUC7061MKZ | 制造商:Analog Devices 功能描述:ADUC7061MKZ EvaluationBoard |
| EVAL-ADUC7061MKZU2 | 制造商:Analog Devices 功能描述:PN may be NE CE 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Boxed Product (Development Kits) |
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