参数资料
型号: EVAL-ADUC7060QSPZ
厂商: Analog Devices Inc
文件页数: 99/100页
文件大小: 0K
描述: KIT DEV QUICK START ADUC7060
产品变化通告: ADuC7060/1 Idd Specification Change 01/Feb/2010
设计资源: ADUC7060 Gerber Files
EVAL-ADuC7060 schematic
标准包装: 1
系列: QuickStart™ PLUS 套件
类型: MCU
适用于相关产品: ADuC7060
所含物品: 评估板、电源、缆线、软件、仿真器和说明文档
其它名称: Q5189809

ADuC7060
HARDWARE DESIGN CONSIDERATIONS
POWER SUPPLIES
The ADuC7060 operational power supply voltage range is
2.375 V to 2.625 V. Separate analog and digital power supply
DIGITAL
SUPPLY
+
10μF
BEAD
ADuC7060
ANALOG
SUPPLY
10μF
pins (AVDD and DVDD, respectively) allow AVDD to be kept
relatively free of noisy digital signals often present on the
system DVDD line. In this mode, the part can also operate with
split supplies; that is, it can use different voltage levels for each
0.1μF
9
30
44
DVDD
AVDD 24
0.1μF
supply. For example, the system can be designed to operate
with an DVDD voltage level of 2.6 V whereas the AVDD level
can be at 2.5 V or vice versa. A typical split supply
29
10
43
DGND
AGND 23
configuration is shown in Figure 27.
Figure 28. External Single Supply Connections
DIGITAL
SUPPLY
ANALOG
SUPPLY
Notice that in both Figure 27 and Figure 28, a large value (10 μF)
+
10μF
10μF
+
reservoir capacitor sits on DVDD, and a separate 10 μF
ADuC7060
capacitor sits on AVDD. In addition, local small value (0.1 μF)
0.1μF
9
30
44
29
10
43
DVDD
DGND
AVDD 24
AGND 23
0.1μF
capacitors are located at each AVDD and DVDD pin of the chip.
As per standard design practice, be sure to include all of these
capacitors and ensure that the smaller capacitors are close to
each AVDD pin with trace lengths as short as possible. Connect
the ground terminal of each of these capacitors directly to the
underlying ground plane.
Note that the analog and digital ground pins on the ADuC7060
Figure 27. External Dual Supply Connections
As an alternative to providing two separate power supplies, the
user can reduce noise on AVDD by placing a small series
resistor and/or ferrite bead between AVDD and DVDD, and then
decoupling AVDD separately to ground. An example of this
must be referenced to the same system ground reference point
at all times.
Finally, note that, when the DVDD supply reaches 1.8 V, it must
ramp to 2.25 V in less than 128 ms. This is a requirement of the
internal power-on reset circuitry.
configuration is shown in Figure 28. With this configuration,
other analog circuitry (such as op amps, voltage reference, and
others) can be powered from the AVDD supply line as well.
Rev. 0 | Page 99 of 100
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