参数资料
型号: FDSS2407
厂商: Fairchild Semiconductor
文件页数: 10/13页
文件大小: 0K
描述: MOSFET N-CH 62V 3.3A 8-SOIC
产品变化通告: Product Obsolescence 13/Aug/2010
标准包装: 2,500
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 62V
电流 - 连续漏极(Id) @ 25° C: 3.3A
开态Rds(最大)@ Id, Vgs @ 25° C: 110 毫欧 @ 3.3A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 4.3nC @ 5V
输入电容 (Ciss) @ Vds: 300pF @ 15V
功率 - 最大: 2.27W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
PSPICE Electrical Model
.SUBCKT FDSS2407 2 1 3 101 102 ; rev July 2004
Ca 12 8 1e-10
Cb 15 14 4e-10
Cin 6 8 2.8e-10
Dbody 7 5 DbodyMOD
ESLC
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
CGATE 9 20 5e-9
DDISABLE 20 101 DDISABLEMOD
DFBK1 104 103 DFBK1MOD
DFBK2 7 104 DFBK2MOD
DFBK3 104 102 DFBK3MOD
RFBK1 5 103 RFBK1MOD 13e3
DPLCAP
10
RSLC2
5
RSLC1
51
5
51
DBREAK
11
103
LDRAIN
RLDRAIN
RFBK1
DFBK1
DRAIN
2
Evthres 6 21 19 8 1
Lgate 1 9 1.8e-9
Ldrain 2 5 1.0e-9
20
EBREAK 17
RFBK2 104 7 RFBK2MOD 2.15e3
Ebreak 11 7 17 18 67.4
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
GATE
Evtemp 20 6 18 22 1 1
It 8 17 1
GATE
Lsource 3 7 0.6e-9 DISABLE
LGATE
RLGATE
CGATE
RGATE
9
-
ESG
+
EVTEMP
+ 18 -
22
6
8
6
EVTHRES
+ 19 -
8
CIN
RDRAIN
16
21
MMED
MSTRO
8
50 +
18
-
MWEAK
DBODY
104
RFBK2
7
INJ FBK
102
DFBK3
DFBK2
LSOURCE
SOURCE
3
EGS
-
RLgate 1 9 18 101
RLdrain 2 5 10
RLsource 3 7 6
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 3.5e-2
Rgate 9 20 RgateMOD 8.63e3
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
Rsource 8 7 RsourceMOD 5.3e-2
DDISABLE
CA
12
S1A S2A
S1B S2B
13 14
8 13
13
+
-
6
8
15
CB
+
EDS
-
5
8
14
8
RSOURCE
RLSOURCE
RBREAK
17 18
RVTEMP
19
IT
VBAT
+
22
RVTHRES
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*20),3.5))}
.MODEL DbodyMOD D (IS=1.1E-12 N=1.05 IKF=4e-1 RS=4.2e-2 TRS1=3e-4 TRS2=1.3e-6
+ CJO=3.3e-10 TT=3e-8 M=0.38, XTI=3.5)
.MODEL DbreakMOD D (RS=1 TRS1=1e-3 TRS2=-9e-6)
.MODEL DplcapMOD D (CJO=1.97e-10 IS=1e-30 N=10 M=0.84)
.MODEL DDISABLEMOD D (RS=30 IS=1e-15 BV=4.7 TBV1=-3e-4 TBV2=-3e-6 XTI=0)
.MODEL DFBK1MOD D (IS=1e-15 BV=23.8 IKF=2 TBV1=-6e-4 TBV2=6e-6)
.MODEL DFBK2MOD D (RS=1 IS=1e-30 BV=5.6 N=3.3 NBV=1)
.MODEL DFBK3MOD D (RS=1 IS=1e-15 BV=4.2 NBV=2.5)
.MODEL MmedMOD NMOS (VTO=1.7 KP=1.08 IS=1e-30 N=10 TOX=1 L=1u W=1u RG= 8.56e3)
.MODEL MstroMOD NMOS (VTO=2 KP=14 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MweakMOD NMOS (VTO=1.5 kp=0.04 IS=1e-30 N=10 TOX=1 L=1u W=1u RG= 8.56e4 RS=0.1)
.MODEL RbreakMOD RES (TC1=1.05e-3 TC2=-9e-7)
.MODEL RdrainMOD RES (TC1=9e-3 TC2=2.7e-5)
.MODEL RSLCMOD RES (TC1=2e-3 TC2=6e-6)
.MODEL RsourceMOD RES (TC1=3e-3 TC2=1e-6)
.MODEL RvthresMOD RES (TC1=-1.1e-3 TC2=-3.3e-6)
.MODEL RvtempMOD RES (TC1=-1.6e-3 TC2=1e-7)
.MODEL RFBK1MOD RES (TC1=-1.4e-3 TC2=1e-6)
.MODEL RFBK2MOD RES (TC1=-1.4e-3 TC2=1e-6)
.MODEL RgateMOD RES (TC1=-1.4e-3 TC2=1e-5)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.0 VOFF=-3.0)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.0 VOFF=-4.0)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.0 VOFF=-0.5)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=-1.0)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options ; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
FDSS2407 Rev. A
10
www.fairchildsemi.com
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