参数资料
型号: FDSS2407
厂商: Fairchild Semiconductor
文件页数: 6/13页
文件大小: 0K
描述: MOSFET N-CH 62V 3.3A 8-SOIC
产品变化通告: Product Obsolescence 13/Aug/2010
标准包装: 2,500
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 62V
电流 - 连续漏极(Id) @ 25° C: 3.3A
开态Rds(最大)@ Id, Vgs @ 25° C: 110 毫欧 @ 3.3A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 4.3nC @ 5V
输入电容 (Ciss) @ Vds: 300pF @ 15V
功率 - 最大: 2.27W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
Typical Characteristics (Continued) T A = 25°C unless otherwise noted
1.2
1.0
0.8
0.6
V GS = V DS , I D = 250 μ A
1.2
1.1
1.0
0.9
I D = 5mA
-80
-40
0
40
80
120
160
-80
-40
0
40
80
120
160
T J , JUNCTION TEMPERATURE ( o C)
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
6
T J , JUNCTION TEMPERATURE ( o C)
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
1000
5
4
FBK voltage measured across
a 51K ? load resistor.
C ISS = C GS + C GD
3
2
T J = 25 o C
T J = 150 o C
T J = -55 o C
100
C OSS ? C DS + C GD
C RSS = C GD
1
V GS = 0V, f = 75kHz
0
10
20
30
40
50
60
70
0.1
1
10
20
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 13. Feedback Voltage vs Drain to Source
Voltage
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 14. Capacitance vs Drain to Source
Voltage
500
400
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
V GS = 5V, I D = 3A
10
8
T J = 150 o C
V GS = V DS
I D = 250 μ A
T J = 25 o C
300
200
T J = 150 o C
T J = 25 o C
6
4
T J = -55 o C
100
0
T J =
-55 o C
2
0
1
2
3
4
5
0
1
2
3
4
5
V DIS , GATE DISABLE VOLTAGE (V)
Figure 15. Drain to Source On Resistance vs
Gate Disable Voltage
FDSS2407 Rev. A
6
V DIS , GATE DISABLE VOLTAGE (V)
Figure 16. Gate to Source Voltage vs Gate
Disable Voltage
www.fairchildsemi.com
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