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| 型号： | HSP50210JC-52Z |
| 厂商： | Intersil |
| 文件页数： | 11/51页 |
| 文件大小： | 0K |
| 描述： | IC DEMODULATOR COSTAS 84-PLCC |
| 标准包装： | 15 |
| 功能： | 解调器 |
| 频率： | 52MHz |
| RF 型： | AM，FM |
| 封装/外壳： | 84-LCC（J 形引线） |
| 包装： | 管件 |
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HSP50210
necessary insight to set the signal level into the Soft
Decision Slicer to yield optimum performance.
the AGC Loop Gain Exponent. When combined, the exponent
and mantissa provide a loop gain defined as Equation 7:
Note: Failure to consider the variations due to noise or
interfering signals, can result in signal limiting in the
AGC Loop Gain: G AGC = [ ( M ) ( 2
– 4
) ] [ ( 2
– ( 7 + E )
) ]
(EQ. 7)
HSP50210 processing algorithms, which will degrade the
system Bit Error Rate performance.
The AGC Loop is configured by the Power Detect Threshold
and AGC Loop Parameters Control Registers (see Tables 16
and 17 on page 33). Seven programmable parameters must be
set to configure the AGC Loop and its status outputs. Two
parameters, the Power Threshold and the AGC Threshold are
associated with the Error Detector and are represented in 8-bit
fractional unsigned binary format: 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 .
While the format provides a range from 0 to 1.9961 for the
where M is a binary number with a range from 0 to 15 and E
is a 3-bit binary value from 0 to 7. M and E are the
parameters set in the AGC Loop Parameters Control
Register, Bits 24 through 30 (see Table 17 on page 33). The
composite range of the AGC loop Gain is 0.0000 to
[0.9375][2 to 7]. This will scale the AGC error signal to a
range of 0.000 to (1.1455)(0.9375)(2 to 7) = 1.07297(2 to 7).
TABLE 2. AGC LOOP GAIN BINARY MANTISSA TO DECIMAL
SCALED MANTISSA MAPPING
thresholds, the Cartesian-to-Polar Converter scales the I
and Q input magnitudes by 0.81. Thus, if a full scale (±1)
complex (I and Q) input signal is presented to the converter,
the output will be √ (0.81) 2 + (0.81) 2 = 1.1455. The AGC
Threshold parameter value is the desired magnitude of the
signal as it enters the Soft Decision Slicer. It is the parameter
that will determine the error signal in the AGC loop. The
Power Threshold, on the other hand, determines only the
power threshold at which the THRESH signal is asserted. If
the signa l magnitude exceeds the threshold, then the
THRESH is asserted. This may be used for signal detection,
power detection or external AGC around the A/D converter.
The AGC Threshold parameter is set in the AGC Loop
BINARY
CODE
(MMMM)
0000
0001
0010
0011
0100
0101
0110
0111
DECIMAL
SCALED
MANTISSA
0.0000
0.0625
0.1250
0.1875
0.2500
0.3125
0.3750
0.4375
BINARY
CODE
(MMMM)
1000
1001
1010
1011
1100
1101
1110
1111
DECIMAL
SCALED
MANTISSA
0.5000
0.5625
0.6250
0.6875
0.7500
0.8125
0.8750
0.9375
Parameters Control Register, Bits 16 through 23 (see
Table 17 on page 33). The Power Threshold parameter is
set in the Power Detect Threshold Control Register, Bits 0
through 7 (see Table 16 on page 33). Note that these two
TABLE 3. AGC LOOP BINARY EXPONENT TO SCALED
DECIMAL EXPONENT MAPPING
threshold parameters are not required to be set to identical
or even related values, since they perform independent
functions.
The Enable AGC parameter sets the AGC Error Detector
output to zero if asserted and to normal error detection
output when not asserted. This control bit is set in the AGC
Loop Parameter Control Register, Bit 31 (see Tables 17 on
page 33). This bit is used to disable the AGC loop.
The remaining AGC parameters determine the AGC loop
characteristics: gain tracking, tracking rate and tracking limits.
The AGC Loop gain is set via two parameters: AGC Loop Gain
Exponent and AGC Loop Gain Mantissa. In general, the higher
BINARY CODE
(EEE)
000
001
010
011
100
101
110
111
DECIMAL/HEX
EXPONENT
0
1
2
3
4
5
6
7
DECIMAL SCALED
EXPONENT
2 -7
2 -8
2 -9
2 -10
2 -11
2 -12
2 -13
2 -14
the loop gain, the faster signal level acquisition and tracking,
but this must be tempered by the specific signal characteristics
of the application and the remaining programmable loop
parameters. For the HSP50210, the AGC Loop Gain provides
for a variable attenuation of the input to the loop filter. The AGC
gain mantissa is a 4-bit value which provides error signal
scaling from 0.000 to 0.9375, with a resolution of 0.0625.
Table 2 on page 11 details the discrete set of decimal values
possible for the AGC Loop Gain mantissa. The exponent
provides a shift factor scaling from 2 -7 to 2 -14 . Table 3 on
page 11 details the discrete set of decimal values possible for
11
FN3652.5
July 2, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50210JI-52 | 功能描述:上下转换器 COSTAS DEMODULATOR,84 PLCC,52MHZ,IND RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50210JI-52Z | 功能描述:上下转换器 COSTAS DEMODULATOR 84 PLCC 52MHZ IND RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50214 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214AVC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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