参数资料
型号: HSP50210JC-52Z
厂商: Intersil
文件页数: 12/51页
文件大小: 0K
描述: IC DEMODULATOR COSTAS 84-PLCC
标准包装: 15
功能: 解调器
频率: 52MHz
RF 型: AM,FM
封装/外壳: 84-LCC(J 形引线)
包装: 管件
HSP50210
AGC AGC
MANTISSA ?
-7 TO 2 -14 )
LIMIT ? LIMIT ?
AGC LOOP FILTER
AGC LOOP
GAIN
UPPER LOWER
(2
AGC LOOP
GAIN
EXPONENT ?
(0.000 TO 0.9375)
AGC ERROR DETECT
R
COMPARE E
G
THRESH
POWER
GAIN
READ
REG
R
E
G
L
I
M
I
T
+
R
E
G
S
H
I
F
T
R
E
G
M
U
X
“0”
THRSHLD ?
+
-
ERROR
AGC GAIN = (1.0 + M) x 2 E
0.000 TO 1.07297(2 -7 )
ENABLE AGC ?
AGC THRSHLD ?
G = -----------
dcloutlvl = agc thresh ? ------------ ?
GAIN
ADJUST
1.0000 TO 15.8572 = G AGC
(0 TO 24dB) CART/POLAR INPUT SELECT ?
CARTESIAN TO POLAR
1.64
2
1.64
? 2 ?
where dcloutlvl is the
magnitude output expressed
in dB from Full Scale (dBFS)
I
G AGC
L
I
I AND D FILTER
M
U
X
1.0
I 2 +Q 2
0.8
MAGNITUDE
(0 TO 1.1455)
TAN -1 ( )
M
I
Q
I
PHASE
Q
T
I AND D FILTER
FIGURE 7. AGC LOOP BLOCK DIAGRAM
? Indicates a microprocessor control signal.
The AGC Loop Filter integrates the scaled error signal to
provide a correction control term to the multipliers in the I and
The AGC Output is implemented in the multiplier according
to Equations 8 and 9.
Out AGC – linear = ( 1.0 + m AGC ) ( 2 )
Out AGC – dB = 20 log [ ( 1.0 + m AGC ) ( 2 ) ]
Q path. The loop filter accumulator has internal upper and
lower limiters. The upper eight bits of the accumulator output
map to an exponent and mantissa format that is used to set
these upper and lower limits. The format, illustrated in Figure
8, is used for the AGC Upper Limit, AGC Lower Limit and the
e
e
(EQ. 8)
(EQ. 9)
Correction Control Term (AGC output). This format should not
be confused with the similar format used for the AGC Loop
Gain. The input to the AGC Loop Filter is included in Figure 8
to show the relative weighting of the input to output of the loop
filter. The loop filter input is represented as the eleven letter
“G”s. Lower case “e” and “m” detail the format for the AGC
Upper and Lower Limits. This change in type case should help
keep the AGC Limits and AGC Gain formats from being
confused. The AGC Upper and Lower Limits are set in the
AGC Loop Parameters Control Register, Bits 0 through15,
(see Table 17). This 6-bit unsigned mantissa format provides
for an AGC output control range from 0.0000 to 0.9844, with a
resolution of 0.015625. The 2-bit exponent format provides an
AGC output control range from 1 to 8. The decimal values for
each of the 64 binary mantissa values is detailed in Table 4,
while Table 5 details the decimal value for the 4 exponent
values.
where m and e are the binary values for mantissa and
exponent found in Tables 4 and 5.
Note: This format is identical to the format used to program
the AGC Upper and Lower Limits, but in this usage it is not a
programmed value. It is a representation of the digital AGC
output number, which is presented to the Gain Adjuster
(multipliers) to correct the gain of the I and Q data signals in
the main data path.
These equations yield a composite (mantissa and
exponent) AGC output range of 0.0000 to 1.9844(2 3 ) which
is a logarithmic range from 0dB to 24dB. Figure 9 has
graphed the results of Equations 8 and 9 for both the linear
and logarithmic equations. Figure 9 also has a linear
estimate of the logarithmic equation. This linear
approximation will be used in calculating the AGC response
time.
2 1 2 0 .2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 2 -14 2 -15 2 -16 2 -17 2 -18
e e .m m m m m m
G G G G G G G G G G G
FIGURE 8. AGC OUTPUT AND AGC LIMITS BIT WEIGHTING
12
FN3652.5
July 2, 2008
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