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| 型号： | I5104XY |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | 音频合成 |
| 英文描述： | 262.2 SEC, SPEECH SYNTHESIZER WITH RCDG, UUC25 |
| 封装： | DIE-25 |
| 文件页数： | 35/87页 |
| 文件大小： | 616K |
| 代理商： | I5104XY |
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41
8393B-MCU Wireless-02/13
ATmega256/128/64RFR2
9.4.1.2.4 RX_ON and BUSY_RX – RX Listen and Receive State
In RX_ON state the receiver blocks and the PLL frequency synthesizer are enabled.
The receive mode is internally separated into the RX_ON and BUSY_RX states. There
is no difference between these states with respect to the analog radio transceiver
circuitry, which are always turned on. In both states the receiver and the PLL frequency
synthesizer are enabled.
During RX_ON state the receiver listens for incoming frames. After detecting a valid
synchronization header (SHR), the receiver automatically enters the BUSY_RX state.
The reception of a valid PHY header (PHR) generates an TRX24_RX_START interrupt
and receives and demodulates the PSDU data.
During PSDU reception the frame data are stored continuously in the Frame Buffer until
the last byte was received. The completion of the frame reception is indicated by an
TRX24_RX_END interrupt and the radio transceiver reenters the state RX_ON. At the
same time the bits RX_CRC_VALID of register PHY_RSSI are updated with the result
of the FCS check (see "Frame Check Sequence (FCS)" on page 72).
Received frames are passed to the frame filtering unit, refer to section "Frame Filtering"
on page 58. If the content of the MAC addressing fields of a frame
(refer to
IEEE 802.15.4 section 7.2.1) matches to the expected addresses, which is further
dependent on the addressing mode, an address match interrupt (TRX24_XAH_AMI) is
issued, refer to "Interrupt Logic" on page 36. The expected address values are to be
stored in the registers Short-Address, PAN-ID and IEEE-address. Frame filtering is
available in Basic and Extended Operating Mode, refer to section "Frame Filtering" on
Leaving state RX_ON is only possible by writing a state change command to bits
TRX_CMD of register TRX_STATE.
9.4.1.2.5 BUSY_TX – Transmit State
A transmission can only be initiated in state PLL_ON. There are two ways to start a
transmission:
Setting Bit SLPTR of register TRXPR to ‘1’. The bit should be cleared before the
frame has been transmitted. This mode is for legacy operation and should be
replaced by the TX_START command below.
TX_START command to bits TRX_CMD of register TRX_STATE.
Either of these causes the radio transceiver into the BUSY_TX state.
During the transition to BUSY_TX state, the PLL frequency shifts to the transmit
frequency. The actual transmission of the first data chip of the SHR starts after 16 s to
allow PLL settling and PA ramp-up, see Figure 9-7 on page 44. After transmission of
the SHR, the Frame Buffer content is transmitted. In case the PHR indicates a frame
length of zero, the transmission is aborted.
After the frame transmission has completed, the radio transceiver automatically turns
off the power amplifier, generates a TRX24_TX_END interrupt and returns into PLL_ON
state.
9.4.1.2.6 RESET State
The RESET state is used to set back the state machine and to reset all registers of the
radio transceiver to their default values.
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