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| 型号： | I5104XY |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | 音频合成 |
| 英文描述： | 262.2 SEC, SPEECH SYNTHESIZER WITH RCDG, UUC25 |
| 封装： | DIE-25 |
| 文件页数： | 48/87页 |
| 文件大小： | 616K |
| 代理商： | I5104XY |
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53
8393B-MCU Wireless-02/13
ATmega256/128/64RFR2
9.4.2.3.1 Description of RX_AACK Configuration Bits
Overview
The following table summarizes all register bits which affect the behavior of a
RX_AACK transaction. For address filtering it is further required to setup address
registers to match to the expected address.
Configuration and address bits are to be set in TRX_OFF or PLL_ON state prior to
switching to RX_AACK mode.
A graphical representation of various operating modes is illustrated in Figure 9-20 on
Table 9-6. Overview of RX_AACK Configuration Bits
Register Name
Register Bits
Description
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
…
IEEE_ADDR_7
Set node addresses
RX_SAFE_MODE
7
Protect buffer after frame receive
AACK_PROM_MODE
1
Support promiscuous mode
AACK_ACK_TIME
2
Change auto acknowledge start time
AACK_UPLD_RES_FT
4
Enable reserved frame type reception, needed to
receive non-standard compliant frames
AACK_FLTR_RES_FT
5
Filter reserved frame types like data frame type,
needed for filtering of non-standard compliant
frames
SLOTTED_OPERATION
0
If set, acknowledgment transmission has to be
triggered by register bit SLPTR
AACK_I_AM_COORD
3
If set, the device is a PAN coordinator
AACK_DIS_ACK
4
Disable generation of acknowledgment
AACK_SET_PD
5
Set frame pending subfield in Frame Control Field
(FCF), refer to section "Overview" on page 72
AACK_FVN_MODE
7:6
Controls the ACK behavior, depending on FCF
frame version number
The usage of the RX_AACK configuration bits for various operating modes of a node is
explained in the following sections. Configuration bits not mentioned in the following two
sections should be set to their reset values.
All registers mentioned in Table 9-6 above are described in section "Register Summary"
Note, that the general behavior of the Extended Feature Set settings:
OQPSK_DATA_RATE
(PSDU data rate)
SFD_VALUE
(alternative SFD value)
ANT_DIV
(Antenna Diversity)
RX_PDT_LEVEL
(blocking frame reception of lower power signals)
are completely independent from RX_AACK mode (see "Radio Transceiver Extended
Feature Set" on page 92). Each of these operating modes can be combined with the
RX_AACK mode.
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