参数资料
型号: I5104XY
厂商: WINBOND ELECTRONICS CORP
元件分类: 音频合成
英文描述: 262.2 SEC, SPEECH SYNTHESIZER WITH RCDG, UUC25
封装: DIE-25
文件页数: 81/87页
文件大小: 616K
代理商: I5104XY
83
8393B-MCU Wireless-02/13
ATmega256/128/64RFR2
Figure 9-23. TX Power Ramping
When using en external RF front-end (refer to "RX/TX Indicator" on page 97) it may be
required to adjust the startup time of the external PA relative to the internal building
blocks to optimize the overall PSD. This can be achieved by PARCR register in the bits
PALTU/PALTD.
9.6.2.5 TX Spectrum side lobe suppression
The output signal TX may be filtered to suppress spectral side lobes. This might be
necessary if an external PA is used. By setting bit PLL_TX_FLT of register
TRX_CTRL_1, the TX signal will be filtered. Filtering has influence to signal quality,
thus EVM of the transmit signal slightly degrades (refer to Transmitter Characteristics
9.6.3 Frame Buffer
The radio transceiver contains a 128 byte dual port SRAM. One port of the frame buffer
is directly connected to the controller I/O space. Therefore random access to single
frame bytes is possible. The other port connects to the internal transmitter and receiver
modules. Both ports are independent and simultaneously accessible for data
communication.
The Frame Buffer uses the controller I/O address space 0x180 to 0x1FF for RX and TX
operation of the radio transceiver and can keep one IEEE 802.15.4 RX or one TX frame
of maximum length at a time.
Frame Buffer access is only possible if the radio transceiver is enabled (PRTRX24 bit in
the Power Reduction Register PRR1 is not set) and not in SLEEP state.
9.6.3.1 Data Management
Data in the Frame Buffer (received data or data to be transmitted) remain valid as long
as:
No new frame or other data are written into the buffer;
No new frame is received (in any BUSY_RX state);
No state change into radio transceiver SLEEP state is made;
No radio transceiver RESET (see bit TRXRST in "TRXPR – Transceiver Pin
Register" on page 199) or system reset took place;
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