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参数资料
| 型号： | IS42VS16160D-75BLI |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54 |
| 封装： | 13 X 8 MM, 0.80 MM PITCH, LEAD FREE, MS-207, BGA-54 |
| 文件页数： | 4/61页 |
| 文件大小： | 939K |
| 代理商： | IS42VS16160D-75BLI |
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12
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
04/21/09
IS42VS83200D, IS42VS16160D
IS45VS83200D, IS45VS16160D
Current State
CS
RAS CAS
WE
Address
Command
Action
WriteRecovering
H
×
DESL
Nop,EnterrowactiveaftertDPL
L
H
×
NOP
Nop,EnterrowactiveaftertDPL
L
H
L
×
BST
Nop,EnterrowactiveaftertDPL
L
H
L
H
BA,CA,A10
READ/READA
Beginread(8)
L
H
L
BA,CA,A10
WRIT/WRITA
Beginnewwrite
L
H
BA,RA
ACT
ILLEGAL(3)
L
H
L
BA,A10
PRE/PALL
ILLEGAL(3)
L
H
×
REF/SELF
ILLEGAL
L
OC,BA
MRS
ILLEGAL
WriteRecovering
H
×
DESL
Nop,EnterprechargeaftertDPL
withAuto
L
H
×
NOP
Nop,EnterprechargeaftertDPL
Precharge
L
H
L
×
BST
Nop,EnterrowactiveaftertDPL
L
H
L
H
BA,CA,A10
READ/READA
ILLEGAL(3,8,11)
L
H
L
BA,CA,A10
WRIT/WRITA
ILLEGAL(3,11)
L
H
BA,RA
ACT
ILLEGAL(3,11)
L
H
L
BA,A10
PRE/PALL
ILLEGAL(3,11)
L
H
×
REF/SELF
ILLEGAL
L
OC,BA
MRS
ILLEGAL
Refresh
H
×
DESL
Nop,EnteridleaftertRC
L
H
×
NOP/BST
Nop,EnteridleaftertRC
L
H
L
H
BA,CA,A10
READ/READA
ILLEGAL
L
H
L
BA,CA,A10
WRIT/WRITA
ILLEGAL
L
H
BA,RA
ACT
ILLEGAL
L
H
L
BA,A10
PRE/PALL
ILLEGAL
L
H
×
REF/SELF
ILLEGAL
L
OC,BA
MRS
ILLEGAL
ModeRegister
H
×
DESL
Nop,Enteridleafter2clocks
Accessing
L
H
×
NOP
Nop,Enteridleafter2clocks
L
H
L
×
BST
ILLEGAL
L
H
L
×
BA,CA,A10
READ/WRITE
ILLEGAL
L
×
BA,RA
ACT/PRE/PALL ILLEGAL
REF/MRS
FUNCTIONAL TRUTH TABLE Continued:
Note:H=Vih,L=Vilx=VihorVil,V=ValidData,BA=BankAddress,CA+ColumnAddress,RA=RowAddress,OC=Op-Code
Notes:
1.AllentriesassumethatCKEisactive(CKEn-1=CKEn=H).
2.Ifbothbanksareidle,andCKEisinactive(Low),thedevicewillenterPowerDownmode.AllinputbuffersexceptCKEwillbe
disabled.
3.Illegaltobankinspecifiedstates;FunctionmaybelegalinthebankindicatedbyBankAddress(BA),dependingonthestateof
that bank.
4.Ifbothbanksareidle,andCKEisinactive(Low),thedevicewillenterSelf-Refreshmode.AllinputbuffersexceptCKEwillbe
disabled.
5.IllegaliftRCDisnotsatisfied.
6.IllegaliftRASisnotsatisfied.
7.Mustsatisfyburstinterruptcondition.
8.Mustsatisfybuscontention,busturnaround,and/orwriterecoveryrequirements.
9.Mustmaskprecedingdatawhichdon’tsatisfytDPL.
10.IllegaliftRRDisnotsatisfied.
11. Illegal for single bank, but legal for other banks.
相关PDF资料 |
PDF描述 |
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| IS45VS16160D-8BLA2 | 16M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| IS43R32800B-5BL | 8M X 32 DDR DRAM, 0.7 ns, PBGA144 |
| IS61C512-25TI | x8 SRAM |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IS42VS16400C1 | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-10T | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-10TL | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-10TLI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12T | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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