参数资料
| 型号： | ISL6267HRZ |
| 厂商： | Intersil |
| 文件页数： | 23/33页 |
| 文件大小： | 0K |
| 描述： | IC PWM CTRLR MULTIPHASE 48TQFN |
| 标准包装： | 50 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 应用： | 控制器，AMD Fusion? CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.013 V ~ 1.55 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 管件 |
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ISL6267
Dynamic Operation
Core VR and Northbridge VR behave the same during dynamic
operation. The controller responds to VID-on-the-fly changes by
slewing to the new voltage at the fixed 7.5mV/μs slew rate.
During negative VID transitions, the output voltage decays to the
lower VID value at the slew rate determined by the load.
threshold. When ENABLE and V DD return to their high operating
levels, a soft-start occurs.
Table 8 summarizes the fault protections.
TABLE 8. FAULT PROTECTION SUMMARY
FAULT DURATION
SVI_L low command prompts the controller to enter DE mode.
Overvoltage protection is blanked during VID down transition in
DE mode until the output voltage is within 60mV of the VID value.
During load insertion response, the Fast Clock function increases
the PWM pulse response speed. The controller monitors the
VSEN pin voltage and compares it to 100ns-filtered version.
FAULT TYPE
Overcurrent
Phase Current
Unbalance
Way-Overcurrent
BEFORE
PROTECTION
120μs
1ms
Immediately
PROTECTION
ACTION
PWM tri-state,
PGOOD latched
low
FAULT
RESET
ENABLE
toggle or
V DD toggle
When the unfiltered version is 20mV below the filtered version,
(1.5xOC)
the controller knows there is a fast voltage dip due to load
insertion, and it issues an additional master clock signal to
deliver a PWM pulse immediately.
Overvoltage +200mV
PGOOD latched
low. Actively pulls
the output
The R 3 ? modulator intrinsically has voltage feed-forward. The
output voltage is insensitive to a fast slew rate input voltage
change.
Over-Temperature
voltage to below
VID value, then
tri-state.
400μs
N/A
2-PHASE MODE
1-PHASE MODE
Protections
Core VR and Northbridge VR both provide overcurrent,
current-balance and overvoltage fault protections. The controller
also provides over-temperature protection. The following
discussion is based on Core VR and also applies to Northbridge VR.
The controller determines overcurrent protection (OCP) by
FB2 Function
The FB2 function is only available for Core VR or Northbridge VR
in 2-phase configuration.
CONTROLLER C1 R2 CONTROLLER C1 R2
IN IN
C3.1 C3.1
comparing the average value of the droop current (I droop ) with an
internal current source threshold as Table 6 shows. It declares OCP
when I droop is above the threshold for 120μs.
For overcurrent conditions above 1.5x the OCP level, the PWM
outputs immediately shuts off and PGOOD goes low to maximize
protection. This protection is also referred to as way-overcurrent
VSEN
C2 R3
R1
FB2 C3.2 C2 R3
R1
VSEN
FB E/A
COMP
VREF
FIGURE 19. FB2 FUNCTION
FB2 C3.2
FB E/A
VREF
COMP
protection or fast overcurrent protection for short-circuit
protections.
The controller monitors the ISEN pin voltages to determine
current-balance protection. If the ISEN pin voltage difference is
greater than 9mV for 1ms, the controller will declare a fault and
latch off.
The controller takes the same actions for all of the previously
describe fault protections: de-assertion of PGOOD and turn-off of
the high-side and low-side power MOSFETs. Any residual inductor
current decays through the MOSFET body diodes.
The controller declares an overvoltage fault and de-asserts PGOOD if
the output voltage exceeds the VID set value by +250mV. The
ISL6267 immediately declares an OV fault, de-asserts PGOOD,
and turn on the low-side power MOSFETs. The low-side power
MOSFETs remain on until the output voltage is pulled down below
the VID set value when all power MOSFETs are turned off. If the
output voltage rises above the VID set value +250mV again, the
protection process is repeated. This behavior provides the
maximum amount of protection against shorted high-side power
MOSFETs while preventing output ringing below ground.
All of the previously described fault conditions can be reset by
bringing ENABLE low or by bringing V DD below the POR
23
Figure 19 shows the FB2 function. A switch (called FB2 switch)
turns on to short the FB and the FB2 pins when the controller is in
2-phase mode. Capacitors C3.1 and C3.2 are in parallel, serving
as part of the compensator. When the controller enters 1-phase
mode, the FB2 switch turns off, removing C3.2 and leaving only
C3.1 in the compensator. The compensator gain increases with
the removal of C3.2. By properly sizing C3.1 and C3.2, the
compensator can be optimal for both 2-phase mode and 1-phase
mode.
When the FB2 switch is off, C3.2 is disconnected from the FB pin.
However, the controller still actively drives the FB2 pin voltage to
follow the FB pin voltage such that C3.2 voltage always follows
C3.1 voltage. When the controller turns on the FB2 switch, C3.2
is reconnected to the compensator smoothly.
The FB2 function ensures excellent transient response in both
2-phase and 1-phase mode. If the FB2 function is not used,
populate C3.1 only.
Adaptive Body Diode Conduction Time
Reduction
In DCM, the controller turns off the low-side MOSFET when the
inductor current approaches zero. During on-time of the low-side
MOSFET, phase voltage is negative, and the amount is the
January 8, 2013
FN7801.1
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