参数资料
型号: ISL6267HRZ
厂商: Intersil
文件页数: 7/33页
文件大小: 0K
描述: IC PWM CTRLR MULTIPHASE 48TQFN
标准包装: 50
系列: Robust Ripple Regulator™ (R³)
应用: 控制器,AMD Fusion? CPU GPU
输入电压: 4.5 V ~ 25 V
输出数: 2
输出电压: 0.013 V ~ 1.55 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(6x6)
包装: 管件
ISL6267
Pin Configuration
FB2_NB 1
FB_NB 2
COMP_NB 3
VW_NB 4
PGOOD_NB 5
ISL6267
(48 LD QFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
36 PWM2_NB
35 BOOT2
34 UG2
33 PH2
32 LG2
Pin Descriptions
SVD 6
PWROK 7
SVC 8
ENABLE 9
PGOOD 10
VR_HOT 11
NTC 12
GND PAD
(BOTTOM)
31 VCCP
30 PWM3
29 LG1
28 PH1
27 UG1
26 BOOT1
25 PROG1
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SYMBOL
FB2_NB
FB_NB
COMP_NB
VW_NB
PGOOD_NB
SVD
PWROK
SVC
ENABLE
PGOOD
VR_HOT
NTC
VW
COMP
FB
7
DESCRIPTION
The components connecting to FB2_NB are used to adjust the compensation in 1-phase mode to achieve
optimum performance.
Output voltage feedback to the inverting input of the Northbridge controller error amplifier.
Northbridge VR error amplifier output.
Window voltage set pin used to set the switching frequency for the Northbridge controller. A resistor from
this pin to COMP_NB programs the switching frequency (8k Ω gives approximately 300kHz).
Open-drain output to indicate the Northbridge portion of the IC is ready to supply regulated voltage.
Pull-up externally to VCCP or 3.3V.
Serial VID data bi-directional signal from the CPU processor master device to the VR.
System power good input. When this pin is high, the SVI interface is active and the I 2 C protocol is running.
While this pin is low, the SVC and SVD input states determine the pre-PWROK metal VID. This pin must
be low prior to the ISL6267 PGOOD output going high per the AMD SVI Controller Guidelines.
Serial VID clock input from the CPU processor master device.
Enable input. A high level logic on this pin enables both VRs.
Open-drain output to indicate the Core portion of the IC is ready to supply regulated voltage. Pull-up
externally to VCCP or 3.3V.
Thermal overload open drain output indicator active LOW.
Thermistor input to VR_HOT circuit to monitor Core VR temperature.
Window voltage set pin used to set the switching frequency for the Core controller. A resistor from this
pin to COMP programs the switching frequency (8k Ω gives approximately 300kHz).
Error amplifier output.
Output voltage feedback to the inverting input of the Core controller error amplifier.
January 8, 2013
FN7801.1
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