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参数资料
| 型号： | M295V002T-120XP1TR |
| 厂商： | 意法半导体 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，启动座单电源闪存 |
| 文件页数： | 16/29页 |
| 文件大小： | 196K |
| 代理商： | M295V002T-120XP1TR |
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AI02083
E
G
W
A0-A17
DQ0-DQ7
VALID
VALID
VCC
tVCHEL
tWHEH
tWHWL
tELWL
tAVWL
tWHGL
tWLAX
tWHDX
tAVAV
tDVWH
tWLWH
tGHWL
Figure 7. WriteAC Waveforms, W Controlled
Note:
Address are latched on the falling edge of W, Datais latched on the rising edge of W.
Erase Suspend (ES) Instruction.
The Block
Eraseoperationmay besuspendedbythisinstruc-
tion which consists of writing the command B0h
without anyspecificaddress.No Codedcyclesare
required. It permits reading of data from another
block and programming in another block while an
erase operation is in progress. Erase suspend is
accepted only during the Block Erase instruction
execution. Writing this command during Erase
timeout will, in addition to suspending the erase,
terminate the timeout. The Toggle bit DQ6 stops
togglingwhentheP/E.C.is suspended.The Toggle
bitswill stoptogglingbetween0.1
μ
sand15
μ
s after
the Erase Suspend (ES) command has been writ-
ten. The device will then automatically be set to
Read Memory Array mode. When erase is sus-
pended, a Read from blocks being erased will
output DQ2 togglingand DQ6 at ’1’. A Read from
a blocknot beingerasedreturnsvalid data.During
suspension the memory will respond only to the
Erase Resume ER and the Program PG instruc-
tions. AProgram operation can be initiatedduring
erase suspend in one of the blocks not being
erased. Itwillresultin bothDQ2andDQ6toggling
whenthedatais beingprogrammed.ARead/Reset
command will definitively abort erasure and result
in invalid data in the blocksbeing erased.
EraseResume(ER)Instruction.
Ifan EraseSus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
Coded cycles.
POWER SUPPLY
PowerUp
ThememoryCommandInterfaceisreset onpower
uptoReadArray.Either E or Wmust be tiedto V
IH
during Power Up to allow maximum security and
thepossibilityto writea commandonthefirstrising
edge of E and W. Any write cycle initiation is
blockedwhen Vcc is below V
LKO
.
Supply Rails
Normal precautionsmust be taken for supply volt-
age decoupling; each device in a system should
havethe V
CC
rail decoupledwith a0.1
μ
F capacitor
close to the V
CC
and V
SS
pins. The PCB trace
widths should be sufficient to carry the V
CC
pro-
gramand erase currents required.
16/29
M29F002T, M29F002NT, M29F002B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M295V002T-120XP6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M295V002T-70K1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M295V002T-70K6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M295V002T-70N1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M295V002T-70N6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
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