参数资料
型号: M295V002T-120XP1TR
厂商: 意法半导体
英文描述: 2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
中文描述: 2兆位的256Kb × 8,启动座单电源闪存
文件页数: 3/29页
文件大小: 196K
代理商: M295V002T-120XP1TR
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
–40 to 125
°
C
T
BIAS
Temperature Under Bias
–50 to 125
°
C
T
STG
Storage Temperature
–65 to 150
°
C
V
IO(2)
Input or Output Voltages
–0.6to 7
V
V
CC
Supply Voltage
–0.6to 7
V
V
(A9, E, G, RPNC)
(2)
A9, E, G, RPNC Voltage
–0.6to 13.5
V
Notes:
1. Except for therating ”Operating Temperature Range”, stresses above those listed in theTable ”AbsoluteMaximum Ratings”
may cause permanentdamage to thedevice. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operatingsections of this specification is not implied.Exposure to Absolute Maximum
Rating conditions for extendedperiods may affectdevice reliability.Refer also tothe STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum Voltagemay undershoot to –2V during transitionand for less than 20ns.
3. Depends on range.
Table2. Absolute MaximumRatings
(1)
Organisation
The M29F002 is organisedas 256K x 8. Memory
control is provided by Chip Enable E, Output En-
able G and Write EnableW inputs.
A Reset/Block Temporary Unprotection RPNC
(NOTavailableon M29F002NT) tri-levelinput pro-
videsa hardwareresetwhenpulledLow,andwhen
held High (at V
ID
) temporarily unprotects blocks
previously protected allowing them to be progra-
med and erased. Erase and Program operations
are controlled by an internal Program/Erase Con-
troller(P/E.C.).StatusRegisterdataoutputon DQ7
providesa Data Pollingsignal, and DQ6 andDQ2
provide Toggle signals to indicatethe state of the
P/E.C operations.
MemoryBlocks
The devices feature asymmetricallyblocked archi-
tecture providing system memory integration.The
M29F002hasan arrayof 7blocks, one BootBlock
of 16 KBytes, two Parameter Blocks of 8 KBytes,
oneMainBlockof 32KBytesandthreeMainBlocks
of 64 KBytes.
Thememorymap is shownin Figure3. Eachblock
can be erased separately, any combination of
blockscan be specifiedfor multi-blockerase or the
entire chip may be erased. The Erase operations
aremanagedautomaticallybytheP/E.C.Theblock
eraseoperationcan besuspendedinorderto read
from or program to any block not being ersased,
andthenresumed.Blockprotectionprovidesaddi-
tional data security. Each block can be separately
protectedor unprotectedagainstProgramorErase
on programming equipment. All previously pro-
tectedblockscanbetemporarilyunprotectedin the
application.
Bus Operations
The following operations can be performed using
theappropriatebus cycles:Read(Array,Electronic
Signature, Block Protection Status), Write com-
mand, OutputDisable,Standby,Reset, Block Pro-
tection, Unprotection, Protection Verify,
Unprotection Verify and Block Temporary Unpro-
tection.See Tables4 and 5.
Command Interface
Instructions,made up of commands written in cy-
cles,can be givento the Program/EraseController
through a Command Interface (C.I.). For added
dataprotection,program or eraseexecutionstarts
after4 or6 cycles.The first,second,fourthand fifth
cycles are used to input Coded cycles to the C.I.
This Coded sequence is the same for all Pro-
gram/Erase Controller instructions. The ’Com-
mand’itself and its confirmation, when applicable,
are given on the third, fourth or sixth cycles. Any
incorrectcommand or any impropercommandse-
quencewill reset the deviceto Read Array mode.
3/29
M29F002T, M29F002NT, M29F002B
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