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参数资料
| 型号： | M30240M5-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件页数： | 94/139页 |
| 文件大小： | 1453K |
| 代理商： | M30240M5-XXXFP |
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58
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Universal Serial Bus
When endpoint is required to initialize the data toggle sequence bit (i.e. reset to DATA0 for the next data pack-
et), the CPU sets this bit to a “1” and then resets it to a “0” to initialize the respective endpoint’s data toggle.
Successful initialization of the data toggle sequence bit can only be guaranteed if no active OUT transaction
to the respective endpoint is ongoing when the initialization process is taking place. Set/reset of the ISO/
TOGGLE_INIT bit should only be performed when an endpoint experiences a configuration event.
OUTxCSR4 (FORCE_STALL):
The USB FCU sets this bit to a “1” when the host sends out a larger data packet than the MAXP size. The
USB FCU returns a STALL handshake while this bit is set. The CPU writes a “0” to clear this bit.
OUTxCSR5 (DATA_ERR):
The USB FCU sets this bit to a “1” to indicate that a CRC error or a bit stuffing error was received in an ISO
packet. The CPU writes a “0” to clear this bit.
OUTxCSR6 (FLUSH):
The CPU writes a “1” to this to flush the OUT FIFO. When there is one packet in the OUT FIFO, a flush causes
the OUT FIFO to be empty. When there are two packets in the OUT FIFO, a flush causes the older packet to
be flushed out from the OUT FIFO. Setting the OUTXCSR6 (FLUSH) bit during reception could produce un-
predictable results.
OUTxCSR7 (AUTO_CLR):
When the CPU sets this bit to a “1”, the OUT_PKT_RDY bit is cleared automatically by the USB FCU after the
number of bytes of data equal to the maximum packet size (MAXP) is unloaded from the OUT FIFO (see “OUT
(Receive) FIFO” for details).
Figure 1.48: USB Endpoint x OUT CSR
1.2.18.4.16 USB Endpoint x IN MAXP Register
The USB Endpoint x IN MAXP Register, shown in Figure 1.49, indicates the maximum packet size (MAXP) of
an Endpoint x IN packet. The default values for Endpoints 1-4 are 0 bytes. The setting of this register also
affects the configuration of single/dual packet operation. When MAXP > 1/2 of the FIFO size, single packet
mode is set. When MAXP <= 1/2 of the FIFO size, dual packet mode is set.
Figure 1.49: USB Endpoint x IN MAXP
USB Endpoint x OUT Control and Status Register (Note 3)
Symbol
Address
When reset
EPiOCS (i = 1-4)
031A16, 032216, 032A16, 033216
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Function
W
R
OUTxCSR0
OUTxCSR1
OUTxCSR2
OUTxCSR3
OUTxCSR4
OUTxCSR5
OUTxCSR6
OUTxCSR7
OUT_PKT_RDY Flag
OVER_RUN Flag
SEND_STALL Bit
ISO Bit
FORCE-STALL Flag
DATA-ERR Flag
FLUSH Bit
AUTO_CLR Bit
0 : Not ready
1 : Ready
0 : No FIFO overrun
1 : FIFO overrun occured
0 : No action
1 : Stall OUT Endpoint x by CPU
0 : Select non-isochronous transfer
1 : Select isochronous transfer
0 : No action
1 : Stall Endpoint X by the USB FCU
0 : No error
1 : CRC or bit stuffing error received in ISO packet
0 : No action
1 : Flush the FIFO
0 : AUTO-CLR disabled
1 : AUTO-CLR enabled
0 0
Note 1: Write "0" only or read
Note 2: Write only - Read "0"
Note 3: Refer to section 1.5.5 "Programming Notes" for this register
Note 1
Note 2
Note 1
USB Endpoint x IN MAXP Register
Symbol
Address
When reset
EPiIMP (i = 1-4)
031B16, 032316, 032B16, 033316
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
IMAXP0 to
IMAXP7
Function
W
R
Maximum packet size
(MAXP) of Endpoint x IN
packet.
For endpoints that support smaller
FIFO size, unused bits are not
implemented, (always write "0" to
these bits).
相关PDF资料 |
PDF描述 |
|---|---|
| M30240M6-XXXXFP | 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| M30240ECFP | 16-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| M30240M5-XXXXFP | 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| M30240M6-XXXXFP | 16-BIT, OTPROM, MICROCONTROLLER, PQFP80 |
| M30240ECFP | 16-BIT, OTPROM, MICROCONTROLLER, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M30240M6 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M6-XXXFP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M7-XXXFP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M8 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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