参数资料
型号: M66291GP
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封装: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件页数: 42/128页
文件大小: 928K
代理商: M66291GP
M66291GP/HP
Rev 1.01 2004.11.01 page 18 of 122
2.6 SOF Control Register
SOF Control Register (SOF_CNT)
<Address : H’0C>
b15
14
13
12
11
10
9876
54321
b0
SOFOE SOFA
00
0
00
0
--
-
<H/W reset : H'0000>
<S/W reset : H’0000>
<USB bus reset : ->
b
Bit name
Function
R
W
15
SOFOE
SOF Output Enable
0 :
Disable SOF signal output
1 :
Enable SOF signal output
14
SOFA
SOF Polarity
0 :
"L" active
1 :
"H" active
13~0
Reserved. Set it to “0”.
00
(1) SOFOE (SOF Output Enable) Bit (b15)
This bit sets the enable/disable of SOF signal output.
When this bit is set to “1”, if SOF packet is received, the INT1/SOF pin outputs SOF signal. The output polarity is
set by SOFA bit.
The SOF signal outputs the pulse (approx. 0.67 us) equivalent to 32 clocks of the 48 MHz clock after receiving
the PID field. Refer to Figure 2.4.
Since the INT1 pin is double-function pin, do not allocate the interrupt signal to this pin when using the SOF
signal (Set by the Polarity Set Register).
SYNC
PID
FLAME
CRC5
Fixed length
Approx. 0.67us
USB bus signal
SOF packet
("L" active)
SOF signal
Figure 2.4 SOF Signal Output Timing
(2) SOFA (SOF Polarity) Bit (b14)
This bit sets the output polarity of SOF signal.
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