M66291GP/HP
Rev 1.01 2004.11.01 page 45 of 122
2.22 Automatic Response Control Register
Automatic Response Control Register (AUTO_RESPONSE_CONTROL)
<Address : H’2C>
b15
14
13
12
11
10
9876
54321
b0
ASCN
ASAD
0
000
-
---
-
--
<H/W reset : H'0000>
<S/W reset : ->
<USB bus reset : ->
b
Bit name
Function
R
W
15~2
Reserved. Set it to “0”.
00
1
ASCN
SET_CONFIGURATION Automatic Response
Mode
0 :
Invalid of automatic response mode for
SET_CONFIGURATION
1 :
Valid of automatic response mode for
SET_CONFIGURATION
0
ASAD
SET_ADDRESS Automatic Response Mode
0 :
Invalid of automatic response mode for SET_ADDRESS
1 :
Valid of automatic response mode for SET_ADDRESS
(1) ASCN (SET_CONFIGURATION Automatic Response Mode) Bit (b1)
This bit sets the valid/invalid of automatic response mode for SET_CONFIGURATION request.
With the automatic response mode set to valid, zero-length packet is automatically transmitted against the
requests below at the status stage before notifying the normal completion. Here, the CTRT bit is not set to “1”
(control transfer stage transition interrupt does not occur).
SET_CONFIGURATION request of Configuration Value ≠ 0 in Address state
SET_CONFIGURATION request of Configuration Value = 0 in Configured state
No automatic response is executed when the SET_CONFIGURATION request other than the ones given
above is received. In such case, the CTRT bit is set to “1” (control transfer stage transition interrupt occurs).
When the state gets changed after receiving the aforesaid requests, the DVST bit is set to “1” if the SCFG bit is
set to “1”, irrespective of the validity of this function (device state transition interrupt occurs).
(2) ASAD (SET_ADDRESS Automatic Response Mode) Bit (b0)
This bit sets the valid/invalid of automatic response mode for SET_ADDRESS request.
With the automatic response mode set to valid, zero-length packet is automatically transmitted against the
requests below at the status stage before notifying the normal completion. Here, the CTRT bit is not set to “1”
(control transfer stage transition interrupt does not occur).
SET_ADDRESS request at Default state
No automatic response is executed when the SET_ADDRESS request other than the ones given above is
received. In such case, the CTRT bit is set to “1” (control transfer stage transition interrupt occurs).
When the state gets changed after receiving the aforesaid requests, the DVST bit is set to “1” if the SADR bit
is set to “1”, irrespective of the validity of this function (device state transition interrupt occurs).