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参数资料
| 型号： | M66291GP |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封装： | 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48 |
| 文件页数： | 60/128页 |
| 文件大小： | 928K |
| 代理商： | M66291GP |
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M66291GP/HP
Rev 1.01 2004.11.01 page 35 of 122
Endpoint 1~6
When set to OUT buffer (EPi_DIR bit = “0”)
The condition for this bit to be set to “1” is as follows:
<The endpoint not specified by DMA_EP bits>
<The endpoint specified by DMA_EP bits with INTM bit set to “1”>
When the IVAL bit of the endpoint changes from “0” to “1”
<The endpoint specified in DMA_EP bits with INTM bit set to “0”>
When the buffer data including the received short packet (including the zero-length
packet) are all read out
The condition for this bit to be cleared to “0” differs according to the RDYM bit (Note):
RDYM bit = “0” : When the IVAL bit of the endpoint changes from “1” to “0”
RDYM bit = “1” : Writes “0” to this bit
Note :
When the INTM bit at the endpoint specified by the DMA_EP bit is set to “0”, the IVAL bit is
retained to “1”. Thus, it is necessary to write “1” to the BCLR bit and to clear the IVAL bit to
“0” when RDYM bit is set to “0”. Even when the RDYM bit is set to “1”, this bit can be cleared
by writing “0”. It is necessary to write “1” to the BCLR bit and to clear the IVAL bit.
When set to IN buffer (EPi_DIR bit = “1”)
The condition for this bit to be set to “1” is as follows:
<The endpoint not specified by DMA_EP bits>
<The endpoint specified by DMA_EP bits with INTM bit set to “1”>
When the IVAL bit of the endpoint changes from “1” to “0”
Or when EPi_DER bit is changed from “0” to “1”
<The endpoint specified by DMA_EP bits with INTM bit set to “0”>
This bit is not be set to “1”.
The condition for this bit to be cleared to “0” differs according to the RDYM bits:
RDYM bit = “0” : When the IVAL bit of the endpoint changes from “0” to “1”
RDYM bit = “1” : Writes “0” to this bit
Note :
The IVAL bit is located per endpoint. For details, refer to “3.2.4 IVAL Bit and EPB_RDY Bit”.
OUT token
Data packet
ACK packet
USB bus
SYNC PID
Addr Endp CRC EOP
SYNC PID
Data CRC EOP
SYNC PID
EOP
Interrupt output
Occurrence of buffer ready interrupt
because the buffer could be read
Figure 2.8 Examples of Buffer Ready Interrupt Occurrence Timing (OUT transfer)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
| M66291HP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller) |
| M66291HP#200D | 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
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