参数资料
型号: MC68HC05V7FN
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 128/170页
文件大小: 589K
代理商: MC68HC05V7FN
MOTOROLA
SECTION 7: POWER SUPPLY AND REGULATION
Page 46
MC68HC05V7 Specification Rev. 1.0
secondary regulator is always enabled (regardless of the mask option selection) but
consumes significantly less power than the primary regulator. The secondary regulator will
provide sufficient voltage to the control logic provided VBATT remains above the minimum
voltage.
7.2
MISCELLANEOUS REGISTER
The software power supply management functions are performed through the
MISCELLANEOUS
register
located
at
$002F.
Although
the
OCE
bit
of
the
MISCELLANEOUS register is unrelated to the power supply, it will be described here.
Figure 7-1:
Miscellaneous Register
7.2.1
IGNS - Ignition status bit
This is a read only status bit which indicates the state of the VIGN pin.
0 - The VIGN pin is less than the VIL level for this pin.
1 - The VIGN pin is greater than the VIH level for this pin.
WARNING: There is not hysteresis or hardware debounce on the VIGN pin and hence, in
the state of this bit. This bit cannot be read unless the Regulator option is enabled.
See 17.3 DC ELECTRICAL CHARACTERISTICS for VIH and VIL levels.
7.2.2
OCE - Output compare enable
This bit controls the function of the PB6 pin.
0 - PB6 functions as a normal I/O pin.
1 - PB6 becomes the TCMP output pin for the 16-bit timer.
See SECTION 11 16-BIT TIMER for a description of the TCMP function.
Reset clears this bit.
7.2.3
PDC - Power Down Control
This bit controls the internal primary voltage regulator.
0 - Disables the internal primary voltage regulator.
1 - Enables the internal primary voltage regulator.
IGNS
MISCELLANEOUS REGISTER
$002F
W
R
PDC
UNIMPLEMENTED
READ
WRITE
ADDR
1
0
2
3
4
5
6
7
REGISTER
0
OCE
0
-
0
------
reset
0
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