参数资料
型号: MC68HC05V7FN
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 63/170页
文件大小: 589K
代理商: MC68HC05V7FN
SECTION 17: ELECTRICAL SPECIFICATIONS
MOTOROLA
Page 141
MC68HC05V7 Specification Rev. 1.0
17.4
REGULATOR ELECTRICAL CHARACTERISTICS
(VBATT = 12 Vdc ±10%, VSS = 0 Vdc, TA = -40°C to +85°C, unless otherwise noted)
Notes: (All values shown reflect average measurements.)
1. Maximum voltage of 26.5V for 5 minutes only. If V
BATT exceeds VBATTMAX, V
DD may deviate from min/max limits.
2. Guaranteed by design. Not tested in productions tests.
3. This is the available current out of the VDD pin for off chip usage.
4. This transient may be disruptive but will not be destructive.
5. Total regulator load of 20mA. Lighter load currents result in lower VDIFF.
* max IDD of 20mA at VDD=3.5V.
Symbol
Characteristic
Min
Max
Units
V
16
VBATT
Input Voltage1
8
V
40
VBATTMAX
Maximum Input Voltage transient amplitude 2,4
26.5
mS
200
VBATTDUR
Maximum Input Voltage transient duration 2,4
--
uA
TBD
I
BIAS
Input Bias Current
TBD
uVrms
TBD
VN
Output Noise Voltage 2
-
dB
65
RR
Ripple Rejection Ratio 2
-
V
2.5
V
DIFF
Input - Output Differential Voltage5 VBATT to VDD with VBATT < min.
1.5*
mA
95
I
SHORT
Short Circuit Current Limit
75
mV/
°C
TBD
Tc
Temperature Coefficient 2
-
mA
20
IO
Output Current 3
-
V
5.25
VDD
Output Voltage
4.75
mV
50
V
LINEREG
Line regulation
-
mV
50
V
LOADREG
Load regulation at 20mA
-
NOTES:
1. All values shown reflect average measurements.
2. Typical values at midpoint of voltage range, 25
°C only.
3. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source to OSC1 (fOSC = 4.2 MHz), all inputs
0.2 VDC from rail; no DC loads, less than 50 pF on all outputs, CL = 20 pF on OSC2.
4. Wait, Stop IDD: All ports configured as inputs, VIL = 0.2 Vdc, VIH = VDD-0.2 Vdc.
5. Stop IDD measured with OSC1 = VSS.
6. Wait IDD is affected linearly by the OSC2 capacitance.
7. Total
* Not Tested.
VDD slew rate rising *
0.1
S
VDDR
V/
s
VDD slew rate falling*
0.05
S
VDDF
V/
s
POR Reset Voltage *
100
V
POR
mV
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